9. Examples and Demonstrations¶

This workshop duplicates information found elsewhere in the RTOS Software Developer Guide for the purpose of creating a cohesive document.

This workshop is a simple introduction for software development using Processor SDK RTOS. The goal of this workshop is to get you familiarized with Processor SDK RTOS and introduce you to using Sitara Evaluation Modules (EVMs) and TI tools.

To accomplish this goal, we will work through an interactive lab using the RTOS Template Application. This application will introduce key concepts of the SDK and serves as the starting point for creating your own application.

Here’s what we’ll learn over the course of this lab:

• Basic usage of Code Composer Studio (CCS)
  • Importing
  • Editing
  • Building
  • Flashing
  • Low level drivers (LLDs) such as UART, GPIO, etc.
  • Operating System Abstraction Layer (OSAL)
  • Board library

  9.1.2. Prerequisites¶

  9.1.2.1. Software¶

  • Processor SDK RTOS for your platform
    • AM335x
    • AM437x
    • AM57x
    • AM65x
    • A download link for CCS is located on the same page as the SDK download.

    If you are using AM65x, you will also need to install latest TI Emulators and Sitara device support packages into CCS. This can be done through CCS –> Help –> Check for Updates.

    9.1.2.2. Hardware¶

    • A supported Sitara Evaluation Module
      • AM335x EVM
      • AM437x EVM
      • AM572x EVM
      • AM654x EVM
      • XDS100-class JTAG debug probes
        • Low cost, low performance
        • XDS100v1 is not supported.
        • Recommended
        • High performance

        9.1.2.3. Recommended Training Videos¶

        • Processor SDK Training Series
          • Introduction to the Processor SDK Training Series
          • Processor SDK Overview
          • Introduction to Processor SDK RTOS Part 1
          • Introduction to Processor SDK RTOS Part 2
          • Application Development Using Processor SDK RTOS

          9.1.3. Template Application Overview¶

          The RTOS Template Application is intended for customers to use as a starting point during software development using Processor SDK RTOS software. The Template Application can be quickly brought up by importing the included Code Composer Studio (CCS) project into the CCS development environment. The application currently includes the typical low level drivers such as UART, GPIO, and I2C, the OSAL layer, and Board Library. For additional details refer to the README.txt file in the installed package.

          9.1.3.1. Components Used¶

          • SYS/BIOS
          • XDCTools
          • Processor SDK RTOS PDK
            • Drivers, OSAL, etc.

            9.1.3.2. Software Design¶

            The Template Application is designed to provide a foundational project with a clean separation of the application-specific submodule from the startup and initialization code. This gives users the ability to focus on application-specific code and quickly get it up and running. This separation is achieved by splitting the “main” and “app” submodules into different files.

            The source files are organized as follows:

            └── template_app ├── main.c --> Main file including startup and init code ├── main.cfg --> Main BIOS config file ├── app.c --> Application tasks are here ├── app.h --> Application header file ├── app.cfg --> Application specific config file ├── app.defs --> Definitions (Currently empty) ├── rtos_template_app___.projectspec --> Project spec file

            In general, to write a new application app.c and app.h can be modified, recompiled, and run.

            9.1.4. Lab¶

            Now that the introductory material is out of the way, it is time to get our hands dirty and begin the lab.

            The AM572x EVM was used for the creation of this lab material, but the same instructions apply for the other supported platforms – AM335x EVM, AM437x EVM, and AM654x EVM.

            9.1.4.1. Task 1 - Installing the Processor SDK into CCS¶

            Before using the Processor SDK, we must install its components into Code Composer Studio (CCS). Typically – if you chose to install the Software Development Kit (SDK) into the default $HOME/ti or C:\ti location – CCS will automatically detect the new products the next time it is opened and prompt you to install them. If you are not prompted to install the new products, you can do so manually through the Window –> Preferences –> Code Composer Studio –> Products menu. This menu will allow you define product discovery paths and rediscover, install, and unistall products.

            

            For more info on setting up CCS. Check out Setup CCS for EVM and Processor-SDK RTOS in the How To Guides.

            9.1.4.2. Task 2 - Importing and Building the RTOS Template Application¶

            We begin the lab by importing the RTOS Template Application into CCS. The Template Application is delivered as a preconfigured CCS Project, making this process very simple. We will also use this as an opportunity to briefly dive into the structure of the SDK.

            To import a project into CCS, go to the Project –> Import CCS Projects. menu. Typically, you will import SDK projects from either the pdk__ or processor_sdk_rtos__ directories. The pdk__ directory contains Chip Support Library (CSL), Low Level Drivers (LLDs), Boot, Diagnostics, and other functions. It is also where LLD example projects are created. The processor_sdk_rtos__ directory contains demos (including the RTOS Template App), documentation, and resources for creating bootable SD cards.

            Now that you have an understanding of these directories, let us move on to importing the Template Application.

            To import a project into CCS open the Project –> Import CCS Projects. menu. Then click Browse. to locate the template app which can be found at: processor_sdk_rtos__/demos/rtos_template_app/// . This will create a copy of the project in your CCS workspace.

            

            After project import is complete you will see the Template Application under the Project Explorer on the left side of CCS. Next, right click on the project and select Build Project. You should get a message that says **** Build Finished **** in the CCS Console.

            9.1.4.3. Task 3 - Hardware Setup¶

            The EVM board is sensitive to electrostatic discharges (ESD). Use a grounding strap or other device to prevent damaging the board. Be sure to connect communication cables before applying power to any equipment.

            Hardware setup will vary depending on which EVM you are using. Generally, you need to make sure that the boot switches are set correctly and that serial, a JTAG debug probe, and power are connected to the board.

            Refer to the Quick Start Guide that came with your board and the Hardware User’s Guide for more detailed hardware setup information.

            • AM335x EVM:
              • Quick Start Guide
              • HW User’s Guide
              • Quick Start Guide
              • HW User’s Guide
              • Quick Start Guide
              • HW User’s Guide

              Example connections for the AM572x EVM are provided below:

              9.1.4.3.1. Front¶

              

              9.1.4.3.2. Back¶

              

              9.1.4.4. Task 4 - Loading and Running the RTOS Template Application¶

              9.1.4.4.1. Creating a Target Configuration File¶

              In order to connect to the target platform we first need to create a target configuration file. To do this, open CCS and go to the File –> New –> Target Configuration File menu and create a new target configuration file named after your board. For example, am572x-evm.ccxml. Next, you need to choose your connection and board on the target configuration file page. The connection is your chosen JTAG Debug Probe (for example, the XDS200) and the board is the name of your EVM (either EVMAM3358, EVMAM437X, or GPEVM_AM572x_SiRevA).

              For example, here is the target configuration for the AM572x EVM using an XDS200 Debug Probe:

              

              After setup is complete, clike the Save button to save your target configuration. Then click Test Connection to verify that you can connect to the board. If the test is successful you should receive the following message:

              The JTAG DR Integrity scan-test has succeeded. 

              9.1.4.4.2. Connecting to the Target¶

              With our target configuration confirmed, we can now move on to connecting to the target and loading our application.

              First, set up the UART connection using the following host configuration in your favorite serial terminal program (e.g. Tera Term, screen, Minicom):

              Next, click on View –> Target Configurations in CCS. Then, right click on the target configuration that you created earlier and click Launch Selected Configuration. This action will switch CCS into the debug perspective. Your CCS instance should look similar to below:

              

              In the top left corner of CCS you should see a list of all of the available cores on your device. Right click on the primary core (listed below) and choose the Connect Target option. During this process you should see GEL output in the CCS console and the status of the core should change from “Disconnected” to “Suspended”.

              Primary cores for each target:

              AM335x	AM437x	AM572x	AM654x
              A8	A9	A15_0	A53_0

              For AM572x EVM, the template application can also run on the M4 and DSP cores. If you intend to run the application on one of these cores you must still connect to the main A15_0 core first. After connecting to the A15_0 core you can then follow the same procedure as above to connect to the secondary core where you would like to run the application. Do not attempt to load and run the template application on two cores simultaneously as the Template Application is not designed to run this way.

              9.1.4.4.3. Running the Application¶

              Now that we are connected to the target, it is time to load the application. To do this, go to the Run –> Load –> Load Program menu in CCS. Then, click the Browse project. button and choose the rtos_template_app__.out executable. Then click OK to load the executable.

              

              

              You should now see the main.c file open in CCS and the program halted at the beginning of the main() function. At this point you can click on the Resume (F8) button to start executing the Template Application.

              The application will begin running and print progress over the UART. You should see the following text printed to your serial terminal:

              Board Init complete Uart Init complete I2C Init complete Gpio Init complete MCSPI Init complete ======== Peripheral Initialization complete ======== ======== Starting to create application tasks ======== gpio_toggle_led_task task created. uart_task task created. spi_test_task task created. i2c_eeprom_read_and_display_task task created. ======== Application tasks created successfully ======== gpio_toggle_led task started uart_task task started i2c_eeprom_read_and_display task started spi_test task started Board Name read: AM572PM_ Board version read: A.30 spi_test task ended i2c_eeprom_read_and_display task ended uart_task :Enter a word or Esc to quit > 

              Type a word into the serial terminal. It should be echoed back to you. Then, enter the ESC character to exit the Template Application. For example:

              uart_task :Enter a word or Esc to quit >hello Data received is:hello uart_task :Enter a word or Esc to quit >test Data received is:test uart_task :Enter a word or Esc to quit >^[ uart_task task ended Template app ended 

              

              Next, click the Terminate button to disconnect from the target. At this point you have successfully imported, built, and run the Template Application.

              9.1.4.5. Task 5 - Examining the RTOS Template Application¶

              Now that you’re familiar with using the Template Application, let us look into the code to see how it all works.

              9.1.4.5.1. The main.c File¶

              Begin by opening the main.c file. At the top of this file, after the copyright header, there are a series of #include statements gathering the necessary header files for the application:

              /* Standard header files */ #include /* XDCtools Header files */ #include  #include  #include  #include  /* BIOS Header files */ #include  #include  /* Board header file */ #include  /* Local template app header file */ #include "app.h" 

              • XDCtools provides configuration tools to create and build a static configuration as part of your application. These headers are necessary for the *.cfg configuration files.
              • BIOS is a synonym for TI-RTOS. These headers are necessary for accessing common RTOS features such as tasks.
              • The Board Library is a thin utility layer on top of CSL and other board utilities. It provides uniform Application Programming Interfaces (APIs) for all supported boards. It aims to assist the user to quickly write portable applications for supported boards by hiding board level details from the user.
              • The app.h header file includes header files for drivers used in the application code as well as macros and function prototypes. Specifically, app.h includes headers for the following LLDs which are used by the application:

              /* Low level driver header files */ #include  #include  #include  #include  #include  #include  

              Next, we come across the main() function which demonstrates the common procedure for initializing an RTOS application. You can read the comments in the code for further clarification. Let’s break down the steps:

              Initialize the board:

              Board_initCfg boardCfg; boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; Board_init(boardCfg); 

              UART_init(); I2C_init(); GPIO_init(); MCSPI_init(); 

              BIOS_start(); 

              9.1.4.5.2. The app.c File¶

              Open the app.c file and take a look at the appTasksCreate() function. You should recall that this function was called in step three of main() . Inside of appTasksCreate() there are biosTaskCreate() function calls for each peripheral task. biosTaskCreate() just wraps the common task creation procudure into an easy-to-use function call. Navigate to the bottom of the app.c file to check out biosTaskCreate() .

              The task creation procudure is as follows:

              Create task variables

              Task_Params taskParams; Error_Block eb; Task_Handle task; 

              Error_init(&eb); Task_Params_init(&taskParams); 

              taskParams.instance->name = taskName; taskParams.priority = taskPriority; taskParams.stackSize = stackSize; 

              task = Task_create(taskFunctionPtr, &taskParams, &eb); 

              The tasks themselves are simply functions in your code following the format below:

              void myTaskFunc(UArg arg0, UArg arg1) 

              Next, let’s take a look at i2c_eeprom_read_and_display_task() to see how to use TI Drivers. The procedure for opening a TI Driver generally follows these steps:

              Create driver handle and params structure

              I2C_Handle handle; I2C_Params params; 

              I2C_Params_init(&params); params.transferMode = I2C_MODE_CALLBACK; params.transferCallbackFxn = someI2CCallbackFunction; // etc. 

              handle = I2C_open(someI2C_configIndexValue, &params); if (!handle)  System_printf("I2C did not open"); > 

              For more information on TI Drivers, check out the included documentation for each driver at pdk__/packages/ti/drv//docs.

              For more infomation on SYS/BIOS, check out the User Guide at bios_/docs.

              9.1.4.6. Task 6 - Modifying the Template Application¶

              Now that you have an understanding of how to use the drivers and create RTOS tasks, let us make some simple modifications to create our own application.

              We will create a simple application which allows the user to control the LED blink rate over the UART terminal. The user should be able to enter an LED blink period (between 0 and 5 seconds) and the user LED should blink at that rate.

              This part of the lab is broken down into several sections. In each section, you will be given general instructions for modifications to make to the source files. After you make your own modifications they will be verified against provided code examples. Try to make the modifications on your own before looking at the answers!

              9.1.4.6.1. Delete the Code You Don’t Need¶

              The Template Application has tasks for UART, I2C, GPIO, and MCSPI drivers. Some of these tasks will not be used by our application. Go ahead and remove any tasks that you do not think you will need to create the application. Hold off on modifying tasks that will be reused until later steps.

              Don’t peek! The next section will discuss answers to the task above.

              Since our application is only consuming user input and blinking the LEDs, we only need the UART and GPIO tasks. That means the I2C and SPI tasks can be removed.

              9.1.4.6.2. Add Support for Additional Features¶

              Our application will require that the UART task has a way to communicate the delay value it receives from the user to the LED task to modify the blink rate. While this could be accomplished with something as simple as a shared global variable, TI-RTOS provides many other ways to accomplish inter-process communication. Take a look at the BIOS User Guide, which is bundled with the SDK at bios_/docs/Bios_User_Guide.pdf for ideas on how to share data between tasks. After you decide on a method, you can use the API documentation located at bios_/docs/Bios_APIs.html to figure out how to use the API in your application.

              Don’t peek! The next section will discuss answers to the task above.

              A good choice for passing the LED blink rate is the ti.sysbios.knl.Mailbox module. This module can be used to pass buffers from one task to another on the same processor.

              To include Mailbox in your project you first need to add the module to the app.cfg file:

              var Mailbox = xdc.useModule('ti.sysbios.knl.Mailbox'); 

              Next, you need to include the ti/sysbios/knl/Mailbox.h header file in app.h:

              #include  

              To create a Mailbox, use the Mailbox_create() API which is defined below:

              Mailbox_Handle Mailbox_create(SizeT bufsize, UInt numBufs, Mailbox_Params *params, Error_Block *eb) 

              You are now set up to use Mailbox in your application code.

              9.1.4.6.3. Add New Application Code¶

              Modify the existing UART and LED task code to functions for the new application. If you run in to any issues, make sure to use CCS debug features such as breakpoints and variable watching to verify that the application is functioning in the way that you expect. Functional example code for the AM572x EVM will be provided at the end.

              Don’t peek! The next section will discuss answers to the task above.

              1. Create a global Mailbox_Handle to be shared by the uart_task() and gpio_toggle_led_task() . Then create a Mailbox at the end of the appTasksCreate() function.
              2. Modify the uart_task() code to scan for an unisgned integer delay value instead of a string. This value should then be placed in the Mailbox by using the Mailbox_post() API.
              3. Modify gpio_toggle_led_task() to retrieve a delay value from the Mailbox via the Mailbox_pend() API. This delay value should be used in the task_sleep() function calls.

              Now, give your project a try. You should be able to type in LED delay values to the UART terminal and see the blink rate of the LED change accordingly. To see a functioning solution, you can download the modified source files from the links below. Sections of the source files that were modified from the originals are marked with a /* Modification: */ comment.

              9.1.5. Additional Information¶

              9.1.5.1. Porting to a Custom Board¶

              The Template Application can be easily modified to run on a custom board. The major change required is to link in a new Board Library. Modifying the Template Application for your custom Board can be achieved by simply removing the ti.board library and PATH from the project and replacing with your specific board libraty and PATH under the linker build options in CCS by right clicking on the project and selecting Properties –> GNU Linker –> Libraries.

              For example, currently the library linked for AM572x is specified in the .projectspec file as follows:

              linkerBuildOptions= -L$/packages/ti/board/lib/evmAM572x/a15/release/ -l:ti.board.aa15fg

              Currently for AM572x EVM there is also a dependemcy on the GPIO_evmAM572x_board.c and GPIO_board.h files. These files can be modified for your custom board.

              9.1.6. Next Steps¶

              Thanks for taking the time to read through this getting started workshop. At this point you should be comfortable with the basic structure of the SDK, know how to import, build, modify, and run applications on the target, and know where to find various documentation in the SDK and Software Developer Guide.

              Next, you can check out our various video training series in the TI training portal, check out our Examples and Demonstrations, and get started writing your own application!

              If you have any questions along the way please remember to read the FAQ or reach out to our engineers on the E2E forums.

              9.2. Image Processing Demo¶

              9.2.1. Introduction¶

              This page describes the image processing demo provided in the Processor-SDK for RTOS. This demo illustrates the integration of key components in the SDK and provides a framework for application development.

              The use case implemented is the transfer of image data from/to DDR and internal memory. Typically, images are large and need to be stored in external memory. Key functions include

              • Operates on different segments of the same image in different cores
              • Operates across multiple cores executing different algorithms on the same image data
              • Transfers input/output image to a medium (SD card or external system)
              • Utilize IPC to communicate between cores to perform an image processing task parallel

              This demo utilizes many SDK features/components:

              • Multi-core application utilizing ARM-A15 and DSP-C66x cores
              • IMGLIB for optimized C66x image processing
              • IPC for interprocessor communication
              • NDK application utilizing NDK for internet access
              • UIA for instrumentation logging

              This demo is not available for all devices. Currently, the following devices and EVM are supported:

              • AM57x, on the AM572x GP EVM
              • C665x, on the C665x EVM
              • C667x, on the C667x EVM
              • K2H, on the K2H EVM

              For AM572x EVM, only the SD card boot option (via SBL) is current supported.

              This demo has been only verified with the Google Chrome along with the 100Mbit router with DHCP

              9.2.2. Requirements¶

              The following materials are required to run this demonstration:

              • TI EVM (see list above)
              • Local Area Network with DHCP support
              • JTAG Emulator (on board or external)
              • Processor-SDK RTOS
              • Code Composer Studio

              9.2.3. Software Design¶

              9.2.3.1. More about processing algorithms¶

              The application will use IMGLIB APIs for its core image processing needs. The following steps are performed for edge detection:

              • Split input image into multiple overlapping slices
              • If it is a RGB image, separate out the Luma component (Y) for processing (See YCbCr for further details)
              • Run Sobel operator (IMG_sobel_3x3_8) to get the gradient image of each slices
              • Run the thresholding operation ( IMG_thr_le2min_8) on the slices to get the edges
              • Combine the slices to get the final output

              9.2.3.2. Framework for multicore¶

              The current framework for multicore is IPC (Message Queue). The following are the overall steps (the master and threads will be run on one or more cores):

              • The master thread will preprocess the input image to make a gray scale or luma image
              • The master thread signal each slave thread to start processing and wait for processing complete signal from all slave threads
              • The slave threads run edge detection function to generate output edge image of the slice
              • Then the slave threads signal master thread indicating the processing completed
              • Once master thread receives completion signal from all threads it proceeds with further user interface processing

              9.2.3.3. How to Build the Demo¶

              9.2.3.3.1. AM572x GP EVM¶

              For Linux:

              • Under ~/ti/processor_sdk_rtos_am57xx_x_0x_xx_xx directory, run the following commands:

              source ./setupenv.sh make demo_clean make demo the OUT files for A15, DSP1 and DSP2 will be built at ~/ti/processor_sdk_rtos_am57xx_x_0x_xx_xx/demos/image_processing/ipc/evmam572x/host/build, ~/ti/processor_sdk_rtos_am57xx_x_0x_xx_xx/demos/image_processing/ipc/evmam572x/dsp1/build, and ~/ti/processor_sdk_rtos_am57xx_x_0x_xx_xx/demos/image_processing/ipc/evmam572x/dsp2/build respectively 

              For Windows:

              • Under C:\ti\processor_sdk_rtos_am57xx_x_0x_xx_xx directory, run the following commands:

              setupenv.bat gmake demo_clean gmake demo the OUT files for A15, DSP1 and DSP2 will be built at C:\ti\processor_sdk_rtos_am57xx_x_0x_xx_xx\demos\image_processing\ipc\evmam572x\host\build, C:\ti\processor_sdk_rtos_am57xx_x_0x_xx_xx\demos\image_processing\ipc\evmam572x\dsp1\build, and C:\ti\processor_sdk_rtos_am57xx_x_0x_xx_xx\demos\image_processing\ipc\evmam572x\dsp2\build respectively

              9.2.3.3.2. C6657 EVM¶

              For Linux:

              • Under ~/ti/processor_sdk_rtos_c665x_x_0x_xx_xx directory, run the following commands:

              source ./setupenv.sh make demo_clean make demo the OUT files for DSPs will be built at ~/ti/processor_sdk_rtos_c665x_x_0x_xx_xx/demos/image_processing/ipc/evmc6657l/master/build, ~/ti/processor_sdk_rtos_c665x_x_0x_xx_xx/demos/image_processing/ipc/evmc6657l/slave/build respectively 

              For Windows:

              • Under C:\ti\processor_sdk_rtos_c665x_x_0x_xx_xx directory, run the following commands:

              setupenv.bat gmake demo_clean gmake demo the OUT files for DSPs will be built at C:\ti\processor_sdk_rtos_c665x_x_0x_xx_xx\demos\image_processing\ipc\evmc6657l\master\build, C:\ti\processor_sdk_rtos_c665x_x_0x_xx_xx\demos\image_processing\ipc\evmc6657l\slave\build respectively

              9.2.3.3.3. C6678 EVM¶

              For Linux:

              • Under ~/ti/processor_sdk_rtos_c667x_x_0x_xx_xx directory, run the following commands:

              source ./setupenv.sh make demo_clean make demo the OUT files for DSPs will be built at ~/ti/processor_sdk_rtos_c667x_x_0x_xx_xx/demos/image_processing/ipc/evmc6678l/master/build, ~/ti/processor_sdk_rtos_c667x_x_0x_xx_xx/demos/image_processing/ipc/evmc6678l/slave/build respectively 

              For Windows:

              • Under C:\ti\processor_sdk_rtos_c667x_x_0x_xx_xx directory, run the following commands:

              setupenv.bat gmake demo_clean gmake demo the OUT files for DSPs will be built at C:\ti\processor_sdk_rtos_c667x_x_0x_xx_xx\demos\image_processing\ipc\evmc6678l\master\build, C:\ti\processor_sdk_rtos_c667x_x_0x_xx_xx\demos\image_processing\ipc\evmc6678l\slave\build respectively

              9.2.3.3.4. K2H EVM¶

              For Linux:

              • Under ~/ti/processor_sdk_rtos_k2hk_x_0x_xx_xx directory, run the following commands:

              source ./setupenv.sh make demo_clean make demo the OUT files for A15, DSPs will be built at ~/ti/processor_sdk_rtos_k2hk_x_0x_xx_xx/demos/image_processing/ipc/evmk2hk/master/build, ~/ti/processor_sdk_rtos_k2hk_x_0x_xx_xx/demos/image_processing/ipc/evmk2hk/slave/build respectively 

              For Windows:

              • Under C:\ti\processor_sdk_rtos_k2hk_x_0x_xx_xx directory, run the following commands:

              setupenv.bat gmake demo_clean gmake demo the OUT files for A15, DSPs will be built at C:\ti\processor_sdk_rtos_k2hk_x_0x_xx_xx\demos\image_processing\ipc\evmk2hk\master\build, C:\ti\processor_sdk_rtos_k2hk_x_0x_xx_xx\demos\image_processing\ipc\evmk2hk\slave\build respectively

              9.2.3.4. How to Run the Demo¶

              9.2.3.4.1. AM572x GP EVM (Using CCS)¶

              The CCS is used to load the program and run on ARM-A15 (HOST), C66x Core 1 (DSP1) and C66x Core 2 (DSP2) by following the steps below:

              • Launch CCS and connect to AM572 GP EVM using proper target configuration
              • Connect to CortexA15_0 (Host) [Push “Power” button right before connect to CortexA15_0]
              
              • Connect to C66xx_DSP1
              
              • Connect to C66xx_DSP2
              
              • Load image_processing_evmam572x_dsp1.out to C66xx_DSP1 using JTAG
              
              • Run image_processing_evmam572x_dsp1.out on C66xx_DSP1
              • Load image_processing_evmam572x_dsp2.out to C66xx_DSP2 using JTAG
              
              • Run image_processing_evmam572x_dsp2.out on C66xx_DSP2
              • Loaded image_processing_evmam572x_host.out to CortexA15_0
              
              • Run image_processing_evmc6678l_master.out on CortexA15_0
              • The HOST will display the IP address on CCS CIO
              
              • Users can use internet browser to access this IP address
              • The Image Processing Demo page will be displayed
              • Provide values for the “Number of Cores” and “Select Image to Process” fields
              

              The HOST will read the image via NDK, partition it according to the number of cores, send the messages to DSP cores (Slaves) via IPC MessageQ. The DSP cores will start processing the partitioned images concurrently. The resulting output image will be stored in DDR and the HOST will be notified by DSP cores via IPC MessageQ. Subsequently, the HOST will write the input and output images to the Image Processing Demo page using NDK.

              

              9.2.3.4.2. AM572x GP EVM (Using SBL)¶

              The SBL is used to load the program from SD card and run on ARM-A15 (HOST), C66x Core 1 (DSP1) and C66x Core 2 (DSP2) by following the steps below:

              

              • Copy “app” and “MLO” from processor_sdk_rtos_am57xx_x_0x_00_0x\prebuilt-sdcards\evmAM572x\sd_card_files on Windows or processor_sdk_rtos_am57xx_x_0x_00_0x/prebuilt-sdcards/evmAM572x/sd_card_files on Linux to the root directory of a formatted micro SD card
              • Plug in the micro SD card into uSD slot on AM572x GP EVM
              • Connect “Serial Debug” on AM572x GP EVM to a PC USB port via a “Serial to USB” cable
              • Launch a terminal emulator like Tera Term and open the local COM port corresponding to the “Serial Debug” (Set it to 115200 bps, 8 bit, none parity, one bit stop, no flow control)
              • Plug power adapter (12V) into the AM572x GP EVM (DC-In) and power on the EVM
              • There the IP address will be displayed on the “Serial Debug”
              • Users can use internet browser to access this IP address
              • The Image Processing Demo page will be displayed
              • Provide values for the “Number of Cores” and “Select Image to Process” fields

              The HOST will read the image via NDK, partition it according to the number of cores, send the messages to DSP cores (Slaves) via IPC MessageQ. The DSP cores will start processing the partitioned images concurrently. The resulting output image will be stored in DDR and the HOST will be notified by DSP cores via IPC MessageQ. Subsequently, the HOST will write the input and output images to the Image Processing Demo page using NDK.

              

              9.2.3.4.3. C6678 EVM or C6657 EVM¶

              CCS is used to load the program and Core 0 will be configured as the host. The following steps show C667x but a similar process applies for C665x.

              • Launch CCS and connect to C6678 EVM using proper target configuration
              • Connect to C66x Core 0 (Host)
              
              • Loaded image_processing_evmc6678l_master.out to C66x Core 0
              
              • Run image_processing_evmc6678l_master.out on C66xx_0
              • Group C66x Core 1-N into a group (Group 1, Slave)
              • Connect to Group 1
              
              • Load image_processing_evmc6678l_slave.out to Group 1 using JTAG
              
              • Run image_processing_evmc6678l_slave.out on Group 1
              • The HOST will display the IP address on CCS CIO
              
              • Users can use internet browser to access this IP address
              • The Image Processing Demo page will be displayed
              • Provide values for the “Number of Cores” and “Select Image to Process” fields
              

              The HOST will read the image via NDK, partition it according to the number of cores, send the messages to DSP cores (Slaves) via IPC MessageQ. The DSP cores will start processing the partitioned images concurrently. The resulting output image will be stored in DDR and the HOST will be notified by DSP cores via IPC MessageQ. Subsequently, the HOST will write the input and output images to the Image Processing Demo page using NDK.

              

              9.2.3.4.4. K2H EVM¶

              CCS is used to load the program and arm_A15_0 will be configured as the master and C66xx_0 - C66xx_7 will be configured as slaves.

              • Launch CCS and connect to K2H EVM using proper target configuration
              • Connect to arm_A15_0 (Host)
              
              • Group C66xx_0 to C66xx_7 into a group (Group 1, Slaves)
              
              • Connect to Group 1
              
              • Load image_processing_evmk2hk_slave.out to Group 1 using JTAG
              
              • Run image_processing_evmk2hk_slave.out on Group 1
              
              • Loaded image_processing_evmk2hk_master_arm.out to arm_A15_0
              
              • Run image_processing_evmk2hk_master_arm.out on arm_A15_0
              
              • The HOST will display the IP address on CCS CIO
              
              • Users can use internet browser to access this IP address
              • The Image Processing Demo page will be displayed
              • Provide values for the “Number of Cores” and “Select Image to Process” fields
              

              The HOST will read the image via NDK, partition it according to the number of cores, send the messages to DSP cores (Slaves) via IPC MessageQ. The DSP cores will start processing the partitioned images concurrently. The resulting output image will be stored in DDR and the HOST will be notified by DSP cores via IPC MessageQ. Subsequently, the HOST will write the input and output images to the Image Processing Demo page using NDK.

              

              9.3. POSIX-SMP Demo¶

              9.3.1. Introduction¶

              This page describes the SMP/Posix demo provided in the Processor-SDK for RTOS and Linux. This demo uses Posix APIs together with a simple benchmark (Dhrystone) to automatically calculate the effective throughput of all the cores in each SMP cluster. SMP mode is only supported on Coretex-A15 cores.

              This demo runs on:

              • AM572x (A15, C66, M4)
              • AM437x (A9)
              • AM335x (A8)
              • K2H (A15, C66)
              • K2E (A15, C66)
              • K2G (A15, C66)
              • K2L (A15, C66)
              • C6678 (C66)
              • C6657 (C66)

              The sections below provide details of the application as well as build and run instructions.

              9.3.2. Requirements¶

              The following materials are required to run this demonstration:

              • TI EVM (see list above)
              • Serial UART cable (provided in EVM kit)
              • Processor-SDK RTOS
              • Code Composer Studio

              9.3.3. Software Design¶

              The demo is based on Dhrystone 2.1 from link.

              The purpose of the demo is two-fold. First, it is to show easy scaling of throughput across cores in a SMP cluster when running TI-RTOS. Second, it shows easy portability of Posix threads between TI-RTOS and Linux.

              The overall requirement is discover all parameters automatically without user input, and to minimize the amount of code that must be customized between TI-RTOS and Linux. This demonstrates that the same Posix threads as well as their setup/control code can be run on either TI-RTOS or Linux with minimal effort.

              In order to accomplish this, several major modifications were made to Dhrystone in order to “threadify” it. Some of these changes slightly affect the results compared to an unmodified version. Thus this modified version should be run on all processors where comparisons will be drawn.

              • Removal of most printf() during normal operation. Original code dumped all final values for the user to verify. Changed to programmatic verification. Only printf() for actual results (DMIPS and Dhrystones) preserved.
              • Removal of all global variables. They are accessed through an “inst” pointer instead.
              • Adaptive discovery of iteration count. Original code used a #define. This version doubles iteration count until execution time is about 10M timer ticks.
              • Adaptive discovery of number of cores in SMP cluster. Original code didn’t use threads. This version doubled number of threads until cumulative DMIPS flattens out.

              POSIX barriers are used inside the timed portion of the code. This is not to time the performance of the barrier, but is instead used to time how long all threads together take to complete. It is assumed the execution times of the threads (> 0.1 second) are orders of magnitude more than the barrier, so the barrier’s effect on results is negligible.

              Processor SDK uses makefiles for TI-RTOS and Yocto recipes for Linux for the supported EVMs. The makefile can also be used to compile native builds for Linux (both for EVMs and x86).

              For more information on TI-RTOS Posix, see POSIX Support.

              9.3.4. How to Run the Demo¶

              The processor SDK includes pre-built binaries which may be loaded and run using the SBL with UART or using CCS with UART or ROV (UART display for newer versions and ROV for older versions). To run using UART, hook up to the board using UART and run the .out file.

              

              To run using CCS, use the following steps. Each binary has an associated \*.rov.xs file located in the same directory–enabling the CCS ROV tool. Newer versions will display directly to the UART console and any steps involving ROV may be skipped.

              SDK_INSTALL_PATH>/processor_sdk_rtos_platform>_2_00_xx_xx/demos/posix-smp/bin/platform>/core>/debug/dhry.out SDK_INSTALL_PATH>/processor_sdk_rtos_platform>_2_00_xx_xx/demos/posix-smp/bin/platform>/core>/debug/dhry_pa15fg.rov.xs 

              For all platforms and core types, the basic procedure for running the demo will be the same:

              1. Using CCS, launch the target configuration for the EVM CCS-Target Configurations. Please ensure that the target configuration will load the appropriate CCS gel files found in the emupak. Make sure all Coretex-A15 cores in the SMP cluster have an appropriate CCS gel file.
              2. The default ccxml file only loads a gel on connect for some of the cores. Modify the ccxml file to load the gel for all the corresponding cores.
              3. In the CCS debug view, group and then connect to all cores of device that you wish to test on (i.e. - all of the clustered A15 cores).
              4. For each, core load the dhry.out file. The principle core should halt at main while the SMP linked cores will begin auto-running upon load.
              5. Once all cores have been loaded, run all the cores.
              6. The output will be sent to the UART console in real time.
              7. The demo should not take more than a few minutes to run. You must manually halt the cores to end the demo.

              If using Processor-SDK 3.0 or later,

              1. Open the ROV window (Tools > RTOS Object View (ROV)) and view the SysMin module to inspect the output of the demo. If you see the below message, please specify the XDC and SYSBIOS versions:
              

              The output buffer shown in the ROV contains the different stages of the demo’s progression:

              1. The demo finds an appropriate number of iterations for the device.
              2. The demo begins to add threads.
              3. The demo concludes when adding additional threads does not further increase the DMIPS.

              The output takes the form of: “xxxxxxx iterations *n threads; dhrystones xxxxxxxx, dmips = xxxx”. In the screenshot above, moving from two threads to four threads does not appreciably improve the DMIPS, so the demo completes. This behavior is expected because the demo is only running on two cores in this example.

              • A15 cores may usually be connected to directly; on the AM572x, the M4 IPUs must first be initialized by the gel scripts (Scripts > AM572x MULTICORE initialization > IPUxSSClkEnable_API)
              • If the K2 demo will not run, try updating to the latest emupack by doing “Help/Check For Updates” and selecting “Keystone2 device support” update (only). There are additional instructions for configuring groups, etc. at SMP Debug.
              • If the primary core of an SMP group will not allow running after loading the demo, try pausing the linked cores and then running all the cores in a group
              • For TI-RTOS documentation for enabling SMP, refer to SMP/BIOS. The POSIX demo in the Processor SDK RTOS packages with C66x does not support SMP. This is a POSIX pthread demo intended to run Dhrystone on one C66x core without SMP.
              • Some of the DMIPS values may not be accurate, but the values will increase proportionally with the number of cores

              9.3.5. How to Build the Demo¶

              9.3.5.1. Processor-SDK RTOS¶

              To build the project manually, first navigate to the top level makefile:

              SDK_INSTALL_PATH>/processor_sdk_rtos_platform>_2_00_xx_xx/demos/posix-smp/makefile 

              Edit the makefile to include the paths to BIOS, XDC, PDK packages, and the toolchains for the cores being used.

              #DEPOT = #### BIOS-side dependencies #### #BIOS_INSTALL_PATH ?= $(DEPOT)\bios_n_nn_nn_nn #XDC_INSTALL_PATH ?= $(DEPOT)\xdctools_n_nn_nn_nn_core #### BIOS-side toolchains #### #TOOLCHAIN_PATH_A15 ?= $(DEPOT)\ccsv6\tools\compiler\gcc-arm-none-eabi-n_n-xxxxqn #TOOLCHAIN_PATH_M4 ?= $(DEPOT)\ccsv6\tools\compiler\ti-cgt-arm_x.x.x 

              Navigate to the demo directory and run “make”. The steps to run the demo will be the same.

              9.3.5.2. Processor-SDK Linux¶

              The Posix-SMP demo has been added to the Linux SDK matrix starting in Processor-SDK 3.0. Simply run the example from the Matrix and the output will be displayed on the console.

              For the documentation on the Linux Matrix, please see: link.

              9.4. Audio Benchmark Starterkit¶

              9.4.1. Introduction¶

              The Audio Benchmark Starterkit is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP devices. This package is intended for users who are new to the TI DSP development environment and provides an easy path to compare core audio benchmarks to other implementations. For the purposes of benchmarking we have selected the following signal processing functions

              • Complex Fast Fourier transform (FFT)
              • Real Block FIR filters with 128 samples, 16 coefficients
              • Cascaded Biquad (2 channels, 3 stages) IIR filter for 128 Samples

              The package is also a great way to get familiar with benchmarking functions on TI DSP with or without TI`s Code Composer Studio environment. It also intends to provide guidance on the compiler options and code/data memory placement that allows developers to obtain optimal performance on TI DSP architecture. The package also demonstrates use of signal processing functions from TI C6000 DSPLIB which contains several kernels optimized for TI DSP architectures.

              9.4.2. Software Features¶

              • Benchmark applications for core signal processing functions
              • Makefile and CCS Project scripts to build applications
              • SD card bootable binaries [Supported on SOCs that support SD boot]

              9.4.3. Directory Structure¶

              The audio benchmark starterkit is located in the Processor SDK RTOS release under the directory path

              \processor_sdk_rtos__x_xx_xx_xx\demos\audio-benchmark-starterkit

              The directory structure for the audio benchmark starterkit is shown in the image below.

              Detailed description of the directory structure is given below: .. Image:: ../images/Audben_dirStructure.png

              • prebuilt-binaries - directory contains prebuilt out files to run the benchmarks.
              • bootimages - SD card boot files to run the benchmarks using SD boot.
              • docs - directory contains ReadMe, Quick start guide and the software manifest for the package.
              • scripts - directory contains .txt script files that is used by BenchmarkProjectCreate script to create CCS projects
              • src - common - Contains linker command file and logging functions used by all benchmark tests. - singlePrecision_FFT - Source files for benchmark app for FFT - singlePrecision_FIR - Source files for benchmark app for FIR - singlePrecision_IIR - Source files for benchmark app for IIR

              9.4.4. Software Dependencies¶

              • Processor SDK RTOS v3.3 and later
              • Code Composer Studio IDE Environment v7 and later

              For correct version of Code Composer Studio to download, please refer to the `Release Notes `__ corresponding to the Processor SDK RTOS version that you have installed

              9.4.5. Supported Hardware¶

              Platforms supported in Processor SDK RTOS 3.3 and later

              Platforms planned in Processor SDK RTOS 4.0

              • OMAPL138/C6748 LCDK
              • K2H EVM rev 1.1 and later
              • K2E EVMs rev 1.0.2.0 and later
              • C6678 EVM
              • C6657 EVM

              9.4.6. QuickStart with How-To-Video¶

              For an easy and visual experience to build and run the benchmark tests, we have created a short How to video that demonstrates how the Benchmark Starterkit can be built and run on C66x DSP on the K2G EVM which you can check out from the link provided below:

              9.4.7. How to Build the Benchmarks¶

              The benchmark starterkit is designed to build with makefiles as well as with Code Composer Studio (CCS) IDE Environment. Both the approaches requires developers to setup the Processor SDK RTOS development environment. Developers can use either approach based on their familiarity with the chosen build environment. Let us take a closer look at both approaches.

              9.4.7.1. Using Makefile¶

              Step1 : Setup Processor SDK RTOS build Environment.

              Developers are required to setup the Processor SDK RTOS build environment as described in Processor SDK RTOS Setup environment

              If developers install CCS or Processor SDK RTOS under Custom path then they need to refer to the setup instructions described under Setup environment when installing to a custom path

              Step2 : Invoke Make from root directory

              The make file in the root director of the audio-starterkit can be used to build the entire package. To build the benchmark examples:

              The build picks up the SOC information from the SDK setup. Also, in the make environment the benchmark application is built to send benchmark logs to UART console so that there is no dependency on the CCS IDE environment

              For Other supported options, please type

              For Windows:

              gmake help 

              For Linux :

              make help 

              All available options are provided below:

              

              9.4.7.2. Using CCS Projects¶

              The audio benchmark starterkit does not provide pre-canned CCS Projects as it is difficult to set up projects to be portable across various developer build environments. To create CCS Projects with the benchmarks, developers are required to run the BenchmarkProjectCreate script provided in the root directory of the starterkit.

              Step1 : Setup Processor SDK RTOS build Environment.

              1. set SDK_INSTALL_PATH = C:\ti\
              2. set TOOLS_INSTALL_PATH = C:\ti\
              3. setupenv.bat

              CCS by default is installed in the path C:\ti\ccsv7 so TOOLS_INSTALL_PATH=C:\ti

              Developers are required to setup the Processor SDK RTOS build environment as described in Processor SDK RTOS Setup environment

              If developers install CCS or Processor SDK RTOS under a Custom path then they need to refer to the setup instructions described under Setup environment when installing to a custom path

              Step 2: Run BenchmarkProjectCreate script to generate CCS Projects

              To generate the CCS Projects

              1. cd $PROC_SDK_INSTALL_PATH/demos/audio-benchmark-starterkit
              2. BenchmarkProjectCreate [Options]

              The Project create script can be run using the following syntax

              BenchmarkProjectCreate.bat soc> board> all> 

              Description of arguments:

              Example: a) BenchmarkProjectCreate.bat - Creates all module projects for the K2G soc for evmK2G platform b) BenchmarkProjectCreate.bat AM572x - Creates all module projects for AM572x soc for evmAM572x and idkAM572x platform c) BenchmarkProjectCreate.bat C6657 evmC6657 - Creates all modules for C6657 DSP for evmC6657 platform d) BenchmarkProjectCreate.bat K2H evmK2H FFT - Creates FFT module project for K2H soc for evmK2H 

              Known issue with Processor SDK RTOS 3.3 The BenchmarkProjectCreate script uses text files .txt from scripts folder to generate the CCS projects. The name for the demo folder was updated from “audio-benchmark-kit” to “audio-benchmark-starterkit”. This will require CCS users to update the name in the .txt file before generating the scripts.

              For Example if you are using K2G platform locate file Benchmark_FFT_evmK2G_c66ExampleProject.txt, Benchmark_FIR_evmK2G_c66ExampleProject.txt and Benchmark_IIR_evmK2G_c66ExampleProject.txt and update the demo name in the text files from “audio-benchmark-kit” to “audio-benchmark-starterkit”

              Step 3: Import Generated CCS Projects in CCS Workspace

              Launch CCS and Import the CCS Project using the Project->Import Existing CCS Project and browse to the audio-benchmark-starterkit folder

              

              Step 4: Build Imported CCS Benchmark Projects

              Right click on the Benchmark Project File and Build the project as shown below:

              

              9.4.8. How to Run the Benchmarks¶

              The benchmark examples can be run by loading the built out files with an emulator using the CCS Debug functionality or the examples can be run on the DSP by creating SD card bootable images using out files. Let us take a look at both these approaches.

              9.4.8.1. Using CCS¶

              Step 1: Connect Emulator and UART to Hardware

              • Refer to the Hardware Setup guide and connect the onboard or external emulator to the Hardware and Host machine with CCS installed.
              • Connect the UART cable from the EVM to the Host machine and configure the Serial console with following settings:
                • Baud Rate: 115200
                • Data Bits: 8
                • Parity: None
                • Flow Control: Off

                Step 2: Create Target configuration and connect to the DSP

                To connect to the SOC, developers need to create a Target configuration by following the procedure described in wiki Create_Target_Configuration_File_for_EVM

                Instructions specific to supported EVMs:

                • K2G GP EVM CCS Setup
                • AM572x GP EVM CCS Setup

                Please refer to Hardware User Guide corresponding to each supported EVM so setup the boot switches to No boot if available

                Step 3: Loading and Running Benchmark application on the DSP

                • Load the out file using Run -> Load -> Load Program and browse to the output binary.
                • After loading the out file, run the benchmark app by Pressing F8 or Run -> Resume

                

                9.4.8.2. Using SD card (Supported only on AM57xx and K2G)¶

                Step 1: Run Create SD script to generate SD bootable binaries

                The root directory in the audio-benchmark-starterkit contains a create-sd.bat file that will convert the .out files installed int the bin folder into SD bootable images which will be installed in the path bin/sd_card_files/

                The syntax to run the create-sd script is as follows:

                create-sd.bat EVM> 

                EVM : refers to evaluation platfom on which the binaries are meant to be run

                Eg: create-sd evmK2G - Creates SD bootable images for K2G EVM.

                Step 2 : Format and copy the SD card binaries to the SD card

                Create an SD card using the procedure described in Creating SD card in Windows and Create SD card in Linux

                Copy the “MLO” and “Singleprecision__app” to the boot partition on the SD card.

                Step 3: Boot the Benchmark app by configuring SD boot on the EVM

                • Configure the boot switches on the evaluation hardware to SD boot.
                • Insert the SD card in the microSD or SD card slot on the board.
                • Connect the UART on the hardware to the Host and configure the host to Baud Rate= 115200, Data Bits= 8 , Parity= None, Flow Control= Off
                • Power on the EVM to view the output on the Serial console on the host

                9.4.9. Benchmark App output on UART console¶

                

                9.4.9.1. Benchmark Starterkit Implementation¶

                Signal Processing functions used in Starterkit

                Single Precision FFT: DSPF_sp_fftSPxSP (Mixed Radix Forward FFT )

                The audio benchmark kit uses the FFT implementation(DSPF_sp_fftSPxSP) from the TI DSP Library. The DSPF_sp_fftSPxSP kernel calculates the discrete Fourier transform of complex input array ptr_x using a mixed radix FFT algorithm. The result is stored in complex output array ptr_y in normal order. Each complex array contains real and imaginary values at even and odd indices, respectively. DSPF_sp_fftSPxSP kernel is implemented in assembly to maximize performance, but a natural C implementation is also provided. The demonstration app for this kernel includes the required bit reversal coefficients, brev , and additional code to calculate the twiddle factor coefficients, ptr_w .

                • For implementation details of this FFT computation refer to documentation provided in Additional resources
                • For Real input sequences, efficient FFT Implementation is described here Efficient_FFT_Computation_of_Real_Input

                Single Precision FIR: DSPF_sp_fir_cplx (Complex FIR Filter)

                The audio benchmark kit uses the FFT implementation(DSPF_sp_fftSPxSP) from the TI DSP Library. The DSPF_sp_fir_cplx kernel performs complex FIR filtering on complex input array x with complex coefficient array h. The result is stored in complex output array y. For each complex array, real and imaginary elements are respectively stored at even and odd index locations.

                The API reference and the implementation details can found in the TI DSPLIB documentation included in the Processor SDK.

                Single Precision IIR : tisigCascadeBiquadSP_2c_3s_kernel (Cascade Biquad Filter for Multichannel input)

                The Cascade biquad filtering function in the audio benchmark starterkit is an improved biquad infinite impulse response filter Patent US20160112033 Pending. The new filter structure modifies the feedback path in the filter, resulting in a significant reduction in execution cycles. One of the most-used digital filter forms is the biquad. A biquad is a second order (two poles and two zeros) Infinite Impulse Response (IIR) filter. It is high enough order to be useful on its own, and because of the coefficient sensitivities in higher order filters the biquad is often used as the basic building block for more complex filters. For instance, a biquad low pass filter has a cutoff slope of 12 dB/octave, useful for tone controls; if a 24 dB/octave filter is needed, you can cascade two biquads and it will have less coefficient sensitivity problems than a single fourth-order design.

                For implementation details please check the USTO link

                int tisigCascadeBiquad32f_2c_3skernel(CascadeBiquad_FilParam *pParam) 

                where CascadeBiquad_FilParam is defined as

                CascadeBiquad_FilParam  float *restrict pin1; // Input Data Channel 1 float *restrict pin2; // Input Data Channel 2 float *restrict pOut1; // Output Data Channel 1 float *restrict pOut2; // Output Data Channel 1 float *restrict pCoef; // Filter Coefficients a, b for 3 stages float *restrict pVar0; // Filter Variables d0, d1 for 3 stages channel 0 float *restrict pVar1; // Filter Variables d0, d1 for 3 stages channel 1 int sampleCount; // Number of samples > CascadeBiquad_FilParam; 

                9.4.10. Memory placement of Instruction and Data¶

                The best performance of the DSP can be obtained by placing all the data and instructions in L2 SRAM. Please refer to the linker command files include in the src/common folder to see how the instructions and data can be place in DSP internal L2 memory.

                In application use cases where audio data needs to be place in onchip shared memory (OCMC or MSMC) and DDR memory, we recommend that users move data from external memory to L2 for processing using EDMA or enable DSP cache using CSL to optimize performance.

                9.4.11. Compiler Optimization Flags¶

                All the projects in the Audio Benchmark starterkit are built using C6000 compiler with -o3 optimization that allows the source code to be compiled with highest compiler optimization settings. User can refer to the compiler Build settings in the Makefiles or go to Build Settings in CCS Project settings to modify the compiler options.

                For more Details on recommended C6000 Compiler options refer C6000_Compiler:_Recommended_Compiler_Options

                • C6000 compiler documentation: C6000 Compiler v8.x User Guide

                9.4.12. SOC Integration and Optimization¶

                9.4.12.1. Configuring device clocks¶

                Every SOC with TI DSP requires users to enable the DSP clocks by setting up the PLL and or enabling the DSP through Power Sleep Controller or Power and Control (PRCM) module. The way the clocks are set up differs depending on the environment setup

                • Development environment with emulator:In this case the SOC clocks are setup using GEL files which are added to the target configuration file. For audio benchmark starterkit, this done using GEL files setup explained in the Hardware Setup section
                • Application Boot from boot mediaIf you are booting application from a boot media like SD/MMC or flash device, the ROM bootloader or a secondary level bootloader performs the clock configuration. For audio starterkit, this initialization is done using board library which is linked to the secondary bootloader and the benchmark tests.

                If the clocks are not configured the DSP will run at speed of the input clock rather than at the device speed grade. Hence if the clocks are not configured correctly the benchmarks will run much slower than anticipated but the cycle count will show the same.

                9.4.13. Benchmarking using DSP TSCH/TSCL registers¶

                For C66x+ and C674x members of the C6000 family, there is a pair of registers, TSCL and TSCH, which together provide a 64-bit clock value. You can create your own clock function to take advantage of these registers. Simply add this function to your program and it will override the clock function from the library.

                The Bench mark test application, use the following functions to capture cycle count using the TSCH and TSCL regsiters.

                /* ---------------------------------------------------------------- */ /* Initialize timer for clock */ TSCL= 0,TSCH=0; /* Compute the overhead of calling _itoll(TSCH, TSCL) twice to get timing info */ /* ---------------------------------------------------------------- */ t_start = _itoll(TSCH, TSCL); t_stop = _itoll(TSCH, TSCL); t_overhead = t_stop - t_start; 

                t_start = _itoll(TSCH, TSCL); Algorithm to be bechmarked> t_stop = _itoll(TSCH, TSCL); t_measured = (t_stop - t_start) - t_overhead; 

                9.4.14. Benchmark logging¶

                The Audio benchmarks demonstrates two ways to log benchmark numbers. One approach that can be used when code is loaded and run from Code composer studio is to use standard printf messages from the standard IO RTS libraries and the other approach is to use UART based logging that can send the benchmark logs to serial console on the host at the baud rate of 115.2 kbps.

                All the benchmark test application include a file Benchmark_log.h and Benchmark_log.c, that are used to log messages based on the definition of macro IO_CONSOLE. If IO_CONSOLE is defined the output will be directed to CCS console. If it is not defined, the logs are sent to the UART console.

                Makefiles and scripts that build binaries to boot from SD card will not have IO_CONSOLE defined hence the benchmark logs will be directed to the UART serial console. In the CCS projects, we define the IO_CONSOLE macro so that the output can be observed on the CCS console.

                9.4.15. Cache configuration for Code/data sections in SRAM/DDR¶

                The best performance of the DSP can be obtained by placing all the data and instructions in L2 SRAM. If developer application use cases places audio data in onchip shared memory (OCMC or MSMC) and DDR memory then the user will need to enable L1 and L2 cache using CSL API.

                To enable and utilize cache in the application, please refer to the csl_cacheAux.h file in the pdk__x_x_x/packages/ti/csl folder in the SDK and link the CSL library for the soc into the application code.

                9.4.16. Benchmark results¶

                AlgorithmDSP Architecture	C66x DSP	C674x DSP
                Single Precision FFT (256 samples)	1808 cycles	2314 cycles
                Single Precision FIR (128 samples, 16 coefficients)	2652 cycles	4465 cycles
                Single Precision IIR (1k samples from 2 channel with 3 stage cascade biquad)	8258 cycles	12381 cycles

                • All code and data for the benchmark tests is placed in L2 Memory.
                • C6000 compiler version used was CGTools v8.1.3
                • Bench marks were obtained from C66x DSP on K2G and C674x DSP on OMAPL138 LCDK
                • FFT and FIR benchmarks were obtained using the DSPLIB functions.

                9.4.17. Support¶

                For questions, feature requests and bug reports, please use the TI E2E Forum provided below:

                9.4.18. Additional resources¶

                White papers:

                • Introduction to TMS320C6000 DSP Optimization
                • TI DSP Benchmarking
                • Optimizing Loops on C66x
                • TI’s new TMS320C66x fixed and floating-point DSP core conquers the ‘Need for Speed’
                • Efficient fixed- and floating-point code execution on the TMS320C674x core delivers faster code development and reduces system cost with improved performance

                9.5. Audio Pre-Processing Demo¶

                9.5.1. Introduction¶

                This page describes the audio pre-processing for speech recognition framework provided in the Processor-SDK for RTOS. This demo illustrates the integration of Beamforming (BF), Adaptive Spectral Noise Reduction (ASNR), Multiple Source Selection (MSS) and Dynamic Range Compression (DRC) components and provides a framework for application development.

                

                The key functions in this use case include:

                • Read 7 canned audio input files from hard drive into buffers in DDR using GEL function
                • Generate 12 virtual mics using BF (Beamforming) (30° apart)
                • Apply ASNR (Adaptive Spectral Noise Reduction) on each virtual mic
                • Use MSS (Multiple Source Selection) to select the best virtual mic from the 12 virtual mics
                • Do DRC (Dynamic Range Compression) on the best virtual mic
                • Display performance data
                • Write one processed audio channel from buffer in DDR to hard drive using GEL function

                This demo utilizes other Processor SDK features/components:

                • SYS/BIOS application utilizing TI-RTOS features for DSP-C66x/C674x core
                • UIA for instrumentation logging

                The audio components are available in AER and VOLIB packages, which are optimized for C66x cores, so this demo not available for all devices. Currently, the following devices and EVMs are supported:

                • AM57x, on the AM572x GP EVM
                • K2G, on the K2G EVM. See TIDEP-0088 (https://www.ti.com/tool/TIDEP-0088) for details
                • OMAP-L137, on the OMAP-L137 EVM. See TIDEP-0099 (https://www.ti.com/tool/TIDEP-0099) for details

                9.5.2. Requirements¶

                The following materials are required to run this demonstration:

                • TI EVMs (see list above)
                • CMB for K2G and OMAP-L137, if using circular microphone
                • Blackhawk USB560 JTAG Emulator (BH-USB-560m)
                • Processor-SDK RTOS (4.0 or greater)
                • Code Composer Studio
                • AER 17.0.0.0 (C64P) (https://www.ti.com/tool/telecomlib)
                • VOLIB 2.1.0.1(C64P for OMAP-L137, C66 for K2G and AM572x) (https://www.ti.com/tool/telecomlib)

                9.5.3. Software Design¶

                9.5.3.1. More about processing algorithms¶

                The application will use AER & VOLIB APIs for its noise reduction processing needs. The following steps are performed for noise reduction:

                • Use 7 canned audio inputs to generate 12 virtual mics using BF(Beamforming) (30° apart)
                • Apply ASNR(Adaptive Spectral Noise Reduction) on each virtual mic
                • Use MSS(Multiple Source Selection)to select the best virtual mic from the 12 virtual mics
                • Do VAD(Voice Activity Detection) on the best virtual mic
                • Write 1 processed audio channel into the buffer in DDR

                9.5.3.2. Framework for Audio Pre-processing¶

                The current framework is based on SYS/BIOS. The following are the overall steps:

                • The CLK object in SYS/BIOS will be configured to generate a Software Interrupt(SWI) every 10 ms
                • The SWI will prepare the audio frame buffer pointers for further processing
                • The SWI will also send a semaphore to wake up the main thread
                • When woke up, the main thread will perform the BF, ASNR, MSS and DRC
                • The main thread will also output the final processing audio frame to the DDR
                • After completed the audio frame processing, the main thread will wait on semaphore for next audio frames to come

                9.5.4. File Based Demo¶

                9.5.4.1. How to Build the Demo¶

                In order to make the following build procedure to work, AER and VOLIB have to be installed at the same location as the Processor SDK RTOS and make sure the AER 17.0.0.0 (C64P) is installed at aer_c64Px_obj_17_0_0_0

                9.5.4.1.1. AM572x GP EVM¶

                For Linux:

                • Under processor_sdk_rtos_am57xx_4_xx_xx_xx directory, run the following commands:

                source ./setupenv.sh make audio_preproc_clean make audio_preproc the OUT files for DSP1 will be built at processor_sdk_rtos_am57xx_4_xx_xx_xx/demos/audio-preprocessing/file_demo_bios/am572x/build 

                For Windows:

                • Under processor_sdk_rtos_am57xx_4_00_xx_xx directory, run the following commands:

                setupenv.bat gmake audio_preproc_clean gmake audio_preproc the OUT files for DSP1 will be built at processor_sdk_rtos_am57xx_4_xx_xx_xx\demos\audio-preprocessing\file_demo_bios\am572x\build

                9.5.4.1.2. K2G EVM¶

                For Linux:

                • Under processor_sdk_rtos_k2g_4_xx_xx_xx directory, run the following commands:

                source ./setupenv.sh make audio_preproc_clean make audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_k2g_4_xx_xx_xx/demos/audio-preprocessing/file_demo_bios/k2g/build 

                For Windows:

                • Under processor_sdk_rtos_k2g_4_00_xx_xx directory, run the following commands:

                setupenv.bat gmake audio_preproc_clean gmake audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_k2g_4_xx_xx_xx\demos\audio-preprocessing\file_demo_bios\k2g\build

                9.5.4.1.3. OMAP-L137 EVM¶

                For Linux:

                • Under processor_sdk_rtos_omapl137_4_xx_xx_xx directory, run the following commands:

                source ./setupenv.sh make audio_preproc_clean make audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_omapl137_4_xx_xx_xx/demos/audio-preprocessing/file_demo_bios/omapl137/build 

                For Windows:

                • Under processor_sdk_rtos_omapl137_4_xx_xx_xx directory, run the following commands:

                setupenv.bat gmake audio_preproc_clean gmake audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_omapl137_4_xx_xx_xx\demos\audio-preprocessing\file_demo_bios\omapl137\build

                9.5.4.2. How to Run the Demo¶

                The demo along with the audio input files will be loaded onto the target using JTAG. After executing, the output file can be read from target. Play both input and output audio files to compare effect of audio pre-processing.

                The following sections provide detailed steps for each EVM.

                9.5.4.2.1. AM572x GP EVM¶

                • Follow this link Setup CCS for EVM and Processor-SDK RTOS to get target configuration setup correctly.
                • Then in CCS tools –> Gel file to load the modified gel file – audio-preprocessing/file_demo_bios/am572x/files_io_7.gel
                • Connect the Blackhawk USB 560M JTAG to P4 on AM572x GP EVM
                • Plug power adaptor(12V) into the AM572x GP EVM (Do not press the Power Button(S1) yet)
                • Launch the target configuration created in step 1 using “Launch Selected Configuration” from CCS 6.1.3
                • Press the Power Button(S1) and “Connect to CortexA15_0” immediately (Due to the EVM will be auto power off in 10 secs)
                • Then “Connect to C66xx_DSP1”
                • Load the AM572x_bf.out from audio-preprocessing\file_demo_bios\am572x\build
                • Execute GEL function Scripts–>Microphone Load Functions–>BFMicLoadAll to load all 7 microphone input files (audio-preprocessing\common\t8\y16L7g3m7090_x.pcm) into external memory buffers
                • Run the program (loaded previously) by pressing F8
                • The program will print out the statistics and “EOF reached” when the program completes processing
                • Execute GEL function Scripts–>Microphone Save Functions–>BFSaveOutput to save the processed audio output from external memory buffer to a file (audio-preprocessingcommont8fileOutput7.bin)

                9.5.4.2.2. K2G EVM¶

                • Follow this link Setup CCS for EVM and Processor-SDK RTOS to get target configuration setup correctly.
                • Then in CCS tools –> Gel file to load the modified gel file – audio-preprocessing/file_demo_bios/k2g/files_io_7.gel
                • Connect to the on board emulator (J1 on K2G EVM) to your PC USB
                • Plug power adaptor(12V) into the K2G EVM and power on the EVM
                • Launch the target configuration created in step 1 using “Launch Selected Configuration” from CCS 6.1.3
                • Then “Connect to C66xx_DSP”
                • Load the K2G_bf.out from audio-preprocessing\file_demo_bios\k2g\build
                • Execute GEL function Scripts–>Microphone Load Functions–>BFMicLoadAll to load all 7 microphone input files ((audio-preprocessing\common\t8\y16L7g3m7090_x.pcm)) into external memory buffers
                • Run the program (loaded previously) by pressing F8
                • The program will print out the statistics and “EOF reached” when the program completes processing
                • Execute GEL function Scripts–>Microphone Save Functions–>BFSaveOutput to save the processed audio output from external memory buffer to a file (audio-preprocessing\common\t8\fileOutput7.bin)

                9.5.4.2.3. OMAP-L137 EVM¶

                • Follow this link Setup CCS for EVM and Processor-SDK RTOS to get target configuration setup correctly.
                • Then in CCS tools –> Gel file to load the modified gel file – audio-preprocessing/file_demo_bios/k2g/files_io_7.gel
                • Connect to the on board emulator (J201 on OMAP-L137 EVM) to your PC USB
                • Plug power adaptor(5V) into the OMAP-L137 EVM and power on the EVM
                • Launch the target configuration created in step 1 using “Launch Selected Configuration” from CCS 6.1.3
                • Then “Connect to C674x_0”
                • Load the DA830_bf.out from audio-preprocessing\file_demo_bios\omapl137\build
                • Execute GEL function Scripts–>Microphone Load Functions–>BFMicLoadAll to load all 7 microphone input files ((audio-preprocessing\common\t8\y16L7g3m7090_x.pcm)) into external memory buffers
                • Run the program (loaded previously) by pressing F8
                • The program will print out the statistics and “EOF reached” when the program completes processing
                • Execute GEL function Scripts–>Microphone Save Functions–>BFSaveOutput to save the processed audio output from external memory buffer to a file (audio-preprocessing\common\t8\fileOutput7.bin)

                9.5.5. Circular Microphone Board Demo¶

                9.5.5.1. How to Build the Demo¶

                In order to make the following build procedure to work, AER and VOLIB have to be installed at the same location as the Processor SDK RTOS and make sure the AER 17.0.0.0 (C64P) is installed at aer_c64Px_obj_17_0_0_0

                9.5.5.1.1. K2G EVM¶

                For Linux:

                • Under processor_sdk_rtos_k2g_4_xx_xx_xx directory, run the following commands:

                source ./setupenv.sh make audio_preproc_clean make audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_k2g_4_xx_xx_xx/demos/audio-preprocessing/realtime_demo_bios/k2g/build 

                For Windows:

                • Under processor_sdk_rtos_k2g_4_00_xx_xx directory, run the following commands:

                setupenv.bat gmake audio_preproc_clean gmake audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_k2g_4_xx_xx_xx\demos\audio-preprocessing\realtime_demo_bios\k2g\build

                9.5.5.1.2. OMAP-L137 EVM¶

                For Linux:

                • Under processor_sdk_rtos_omapl137_4_xx_xx_xx directory, run the following commands:

                source ./setupenv.sh make audio_preproc_clean make audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_omapl137_4_xx_xx_xx/demos/audio-preprocessing/realtime_demo_bios/omapl137/make 

                For Windows:

                • Under processor_sdk_rtos_omapl137_4_00_xx_xx directory, run the following commands:

                setupenv.bat gmake audio_preproc_clean gmake audio_preproc the OUT files for DSP will be built at processor_sdk_rtos_omapl137_4_xx_xx_xx\demos\audio-preprocessing\realtime_demo_bios\omapl137\make

                9.5.5.2. How to Run the Demo¶

                The demo works with the real time audio input from CMB. After processing is complete, the audio output will be sent to the line-out(left channel) of the K2G EVM on-board audio codec. For the purpose of comparison, the unprocessed center microphone (mic 8) will be sent out to the line-out (right channel) of the K2G EVM on-board audio codec.

                The following sections provide detailed steps for each EVM.

                9.5.5.2.1. K2G EVM (using CCS)¶

                • Follow this link Setup CCS for EVM and Processor-SDK RTOS to get target configuration setup correctly.
                • Connect to the on board emulator (J1 on K2G EVM) to your PC USB
                • Plug power adaptor(12V) into the K2G EVM and power on the EVM
                • Launch the target configuration created in step 1 using “Launch Selected Configuration” from CCS 6.1.3
                • Then “Connect to C66xx_DSP”
                • Load the K2G_bf_rt.out from audio-preprocessing\realtime_demo_bios\k2g\build
                • Run the program (loaded previously) by pressing F8
                • The program will run the real time demo forever, taking the input from CMB and output to the on-board line-out

                9.5.5.2.2. OMAP-L137 EVM (using CCS)¶

                • Follow this link Setup CCS for EVM and Processor-SDK RTOS to get target configuration setup correctly.
                • Connect to the on board emulator (J201 on OMAP-L137 EVM) to your PC USB
                • Plug power adaptor(5V) into the OMAP-L137 EVM and power on the EVM
                • Launch the target configuration created in step 1 using “Launch Selected Configuration” from CCS 6.1.3
                • Then “Connect to C674X_0”
                • Load the OMAPL137_bf_rt.out from audio-preprocessing\realtime_demo_bios\omapl137\make
                • Run the program (loaded previously) by pressing F8
                • The program will run the real time demo forever, taking the input from CMB and output to the on-board line-out

                9.5.5.2.3. K2G EVM (Boot from SD card)¶

                • Copy “app” and “MLO” from audio-preprocessing\realtime_demo_bios\k2g\pre-built\mmcsd on Windows or audio-preprocessing/realtime_demo_bios/k2g/pre-built/mmcsd on Linux to the root directory of a formatted micro SD card
                • Plug in the micro SD card into uSD Card slot on K2G EVM
                • Connect “USB TO SOC UART0” on K2G EVM to a PC USB port via USB cable
                • Launch a terminal emulator like Tera Term and open the local COM port corresponding to the UART0 (Set it to 115200 bps, 8 bit, none parity, one bit stop, no flow control)
                • Plug power adapter (12V) into the K2G EVM and power on the EVM and Power on the K2G EVM
                • There will be some information displayed on the SOC UART0
                • The program will run the real time demo forever, taking the input from CMB and output to the on-board line-out

                9.5.6. How to Read the Input/output Audio Files¶

                Both the input/output audio files are in raw PCM format ( * .pcm or *.bin) 16 bit per sample, big endian, mono, at 16Khz. They can be imported either by Adobe Audition or Audacity as the raw audio data.

                9.5.6.1. Import Raw Audio Data File using Adobe Audition¶

                

                • Launch the Adobe Audition CS5.5
                • File –> Import –> Raw Data.
                • The following dialog will pop up
                • Select the raw audio file and input the correct parameters
                • Click OK

                9.5.6.2. Before and After Comparison¶

                • Before audio pre-processing (t8/y16L7g3m7090_1.pcm)
                
                • After audio pre-processing (t8/fileOutput.bin)
                

                9.6. Performance Audio Demo¶

                9.6.1. Introduction¶

                This page describes the performance audio demo, developed within Processor SDK RTOS on 66AK2Gx platform. This demo implements and integrates audio I/O, framework, auto-detection, decoding, audio stream processing (ASP) and encoding - the foundational building blocks of any performance audio application. The system block diagram below shows the structure of the demo.

                

                This demo utilizes Processor SDK features/components:

                • SYS/BIOS application utilizing TI-RTOS features for DSP-C66x core and ARM-A15 core
                • McASP LLD from PDK for audio input/output
                • IPC for inter-processor communications between DSP and ARM
                • UIA for instrumentation logging

                9.6.2. Requirements¶

                • 66AK2Gx Evaluation Module (EVMK2G)
                • 66AK2Gx Audio Daughter Card (AUDK2G)
                • Momentum Data Systems (MDS) HDMI repeater kit (optional). Contact contactsales @ mds . com for more information.
                • Code Composer Studio (CCS)
                • Python 2.7.14 and Sed 4.2.1 for Windows only

                9.6.3. How to Run the Demo¶

                9.6.3.1. Hardware Setup¶

                

                • Setup K2G EVM according to the Quick Start Guide
                • Setup Audio Daughter Card according to the Quick Start Guide and attach it to the K2G EVM. The Audio Daughter Card connects to the EVM through the JP1 “Audio Expansion” and J12 “Serial Expansion” connectors on EVM.
                • Connect an analog player output to the ADC_IN0-3 input jacks on the Audio Daughter Card.
                • Connect a DVD/Blue-Ray player digital output (S/PDIF) to the MOD1 Digital Input (Optical) connector on the Audio Daughter Card.
                • Connect speakers to DAC_OUT0-3 output jacks on the Audio Daughter Card.
                • Connect a COM port on PC to UART0 port on K2G EVM using a RS-232 cable.
                • Connect XDS2xx USB Onboard Debug Probe to a PC USB port using the USB cable delivered with the EVM.

                9.6.3.2. Optional Setup for HDMI¶

                

                • Connect the MDS HSR41P to the MDS IFB.
                  • Connect HSR41P J4 “Main” header to the IFB J5 “Main” header using the short 26-wire ribbon cable. Ensure the red wire on the ribbon cable is connected between HSR41P J4 Pin1 and IFB J5 Pin1.
                  • Connect HSR41P J7 “Sec” header to the IFB J2 “Sec” header using the short 34-wire ribbon cable. Ensure the red wire on the ribbon cable is connected between HSR41P J7 Pin1 and IFB J2 Pin1.
                • Connect the MDS IFB to the Audio Daughter Card. Connect IFB J3 “McASP0” header to Audio Daughter Card “I2S Header” using the supplied long 34-wire ribbon cable. Ensure the red wire on the ribbon cable is connected between IFB J3 Pin1 and Audio Daughter Card “I2S Header” Pin1 (note the “I2S Header” is only 32 pins, so the two wires on the ribbon cable opposite Pin1 are unused).
                • Connect HDMI cable from audio source (e.g. Blu-ray player) to HSR41P J6 “IN”. Connect HDMI cable to audio sink (e.g. HDMI enabled monitor) from HSR41P J8 “HDMI OUT”.
                • Connect 5V AC to USB power supply to IFB power connector J1.

                9.6.3.3. Software and Tools Setup¶

                CCS is required to load the binaries and run the demo. Sed and Python are required for run time reselection of input/output, control and reconfiguration of decoding and/or audio stream procesing, etc. One may choose to run the demo first and then install Sed and Python for run-time reconfiguration.

                • Download and Install CCS (download link available at Processor SDK download page)
                • Obtain Sed 4.2.1 from https://gnuwin32.sourceforge.net/packages/sed.htm, executable installer, sed-4.2.1-setup.exe (click on Setup next to “Complete package, except sources” and download will start). Install it to c:/PA_Tools/GnuWin32 (or change installation location in /demos/performance-audio/src/setup_build_env/setup_env.bat.
                • Obtain Python 2.7.14 from https://www.python.org/downloads/release/python-2714/ (click on Windows x86 MSI installer, and the installer python-2.7.14.msi will be downloaded automatically). Install it to c:/PA_Tools/Python27 (or change installation location in /demos/performance-audio/src/setup_build_env/setup_env.bat.
                • Once Python is installed, open a Command Prompt and go to /demos/performance-audio/src/setup_build_env. Run setup_env.bat, and then go to /demos/performance-audio/tools/ and run setup.bat to install PyAlpha dependencies. Note: since tools/setup.bat will download Python packages from the web, one needs to make sure that the proxy environment variables are set properly.

                9.6.3.4. Load and Run Pre-built Binaries¶

                This demo can be run by loading and running the DSP and ARM binaries through CCS:

                1. Click View -> Target Configurations.
                2. In the Target Configurations window, right click and then click Import Target Configurations.
                3. Browse to /demos/performance-audio/src/pasrc/test_dsp/targetConfigs, click K2GEVM.ccxml and then click Open.
                4. In the Target Configurations window, right-click on K2GEVM.ccxml and select Launch Selected Configuration.
                5. In the Debug window, right-click on the C66x and select Connect Target. The output from the GEL code invoked on the target connection can be observed in the Console output window. The final line of this output should read “C66xx: GEL Output: DDR3A initialization complete”.
                6. In the Debug window, right-click on the CortexA15 and select Connect Target. The output from the GEL code invoked on the target connection can be observed in the Console output window. The final line of this output should read “CortexA15: GEL Output: A15 non secure mode entered”.
                7. In the Debug Window, click on the C66x. Then open Run->Load->Load Program. In the Load Program window, click on Browse and double click /demos/performance-audio/prebuilt-binaries/test_dsp.xe66. Then click OK to load the C66x binary.
                8. In the Debug Window, click on the CortexA15. Then open Run->Load->Load Program. In the Load Program window, click on Browse and double click /demos/performance-audio/prebuilt-binaries/test_arm.xa15fg. Then click OK to load the CortexA15 binary.
                9. In the Debug window, click on the C66x. Then Open Run->Resume to execute the C66x code.
                10. In the Debug window, click on the CortexA15. Then Open Run->Resume to execute the CortexA15 code.
                11. The CIO Console output window should display memory usage statistics. The final line of output should display the memory usage summary for the EXT NC SHM heap.
                12. Default input interface is S/PDIF. Play music on the media player with S/PDIF output. Sound should come out of speakers connected to analog out DAC_OUT0.
                • If code needs to be reload and rerun, one must terminate the CCS debugging session, power cycle the EVM, and start a new CCS debugging session. Then repeat from step 4 listed above.

                9.6.3.5. Run-time Reconfiguration (in Windows only)¶

                Please make sure src/setup_build_env/setup_env.bat and tools/setup.bat have both been run to setup the tools path.

                Output volume can be changed at run-time via Python scripts through UART:

                • Open a windows command prompt, go to tools folder and use the following command to change output volume:
                  • python.exe pyalpha -I alpha -h pa_i13_evmk2g_io_a -p COM1 writeVOLControlMasterN(), where is level adjustment from default in units of 0.5dB. For example, python.exe pyalpha -I alpha -h pa_i13_evmk2g_io_a -p COM1 writeVOLControlMasterN(-24) lowers the level by 12dB from default.

                  Input interface is S/PDIF by default and can be reslected at run-time (Note: interface can be reselected only when playing is stopped):

                  • Switch to HDMI input:
                    • Stop playing
                    • Issue command to change to HDMI input: python.exe pyalpha -I alpha -h pa_i13_evmk2g_io_a -p COM1 execPAIInHDMI
                    • Play again using digital player with HDMI output
                    • Stop playing
                    • Issue command to change output to ADC slave: python.exe pyalpha -I alpha -h pa_i13_evmk2g_io_a -p COM1 execPAIOutAnalogSlave
                    • Issue command to change input to analog: python.exe pyalpha -I alpha -h pa_i13_evmk2g_io_a -p COM1 execPAIInAnalog
                    • Play again using analog player

                    Limitations of run-time reconfiguration as of this release:

                    • Input interface reselection can only be done when input is mute.
                    • Once analog input is selected, S/PDIF can NOT be selected anymore. One must reload the code and rerun the demo.

                    9.6.4. How to Rebuild the Demo¶

                    The performance audio demo can be rebuilt from the source code, following the instructions given below.

                    9.6.4.1. Setup Environment Variables in Linux¶

                    A bash shell script, /demos/performance-audio/src/setup_build_env/setup_env.sh, can be used to set up the environment variables:

                    • set the TI tools path and performance audio demo path in setup_env.sh properly.
                    • set version numbers of each component to what’s going to be used for the build (default is what’s delivered in PRSDK).
                    • run the shell script using command “source setup_env.sh”.

                    9.6.4.2. Setup Environment Variables in Windows¶

                    Batch file /demos/performance-audio/src/setup_build_env/setup_env.bat can be used to set up the environment variables.

                    • set variable TI_TOOLS_DIR in setup_env.bat properly (default is C:ti).
                    • set version numbers of each component to what’s going to be used for the build (default is what’s delivered in PRSDK).
                    • go to folder /demos/performance-audio/src/setup_build_env and run setup_env.bat (Note: this script MUST be run in the setup_build_env folder.)
                    • after running setup_env.bat, run setup_paf.bat in the same folder (Note: setup_env.bat MUST be run before setup_paf.bat).

                    9.6.4.3. Rebuild the Demo¶

                    • Go to source folder: /demos/performance-audio/src
                    • Issue command “make clean” and “make install” for Linux
                    • Issue command “gmake clean” and “gmake install” for Windows
                    • The rebuilt binaries are placed in src/install/pasdk/debug. They can also be found at src/pasdk/test_dsp/bin/debug and src/pasdk/test_arm/bin/debug

                    9.6.5. Trouble Shooting¶

                    Problems may be encountered when setting up or running the demo. Here are some common problems and the corresponding solutions:

                    1. Sound doesn’t come out of the speakers:
                    • Make sure the audio daughter card (and HDMI repeater card if used) is connected well. The PDK addon audio loopback test can be run to verify the setup of EVM and audio daughter card.
                    • In CCS Expressions window, enter variable “asipLoopCount1” and check if it is incrementing. If not, terminate the debug session, power cycle the EVM, and restart.
                    1. The Python command times out:
                    • Make sure to use UART0 COM port on the EVM. The Python scripts may not work well if J23 USB connector is used for UART communications.
                    1. The source code doesn’t build:
                    • Make sure the environment variables are set correctly. The default tools location in setup.env may not be where the tools are installed. Change TI_TOOLS_DIR to where tools and Proc-SDK components are installed.
                    1. Python setup can’t install PyAlpha dependencies.
                    • Make sure proxy environment variables, HTTP_PROXY and HTTPS_PROXY, are set properly.

                    9.7. Big Data IPC Example¶

                    9.7.1. Introduction¶

                    High Performance Computing applications and other Data intensive applications often require passing of Big data buffers between the multi-core processors in an SOC.

                    The Big Data IPC examples are created mainly to show exchange of big data buffers between cores and is part of the Processor SDK RTOS package.

                    Currently the example named “simple_buffer_example”, captures the details of exchange of big buffers with both host A15 core and a DSP cores.

                    9.7.2. Architecture Overview¶

                    The following block diagram shows the various functional blocks used in the example on the cores running TI-RTOS/BIOS.

                    

                    For the small message IPC, sharedRegion and Heap, the modules in the Standard TI IPC package are used.

                    The BigDataXlat module, which is part of the example code, provides a high level abstraction to take care of Address translation and Cache sync on the big data buffers.

                    9.7.3. Simple Buffer example: Program Sequence¶

                    This section describes the program sequence captured in the example.

                    The main aim of the overall program is to show the exchange of big data buffers. The sequence is described in words here to sort of walk through the main application code.

                    Initially, the host sends first message with shared memory init information followed by two more dummy messages to slave core ( all three messages sent in sequence without waiting for reply).

                    The shared memory region init message conveys the details about the shared memory expected to hold the big data buffers.

                    Independently, the slave processor receives messages and sends back reply back for each of the messages to the host.

                    Then the host receives one message from the slave and sends a message with Big data buffer allocated from the Big data heap and filled with an incrementing pattern. (This process is repeated with 10 Big data Buffer messages). Each of these Messages are received by slave and the values in the buffers are updated with a modified incrementing pattern and sent back to the host.

                    Note the Slave and Host processors checks the expected incrementing pattern for errors.

                    At this point only 7 Big data buffer messages would have been received. Then the host sends two dummy messages plus one shutdown message to the slave core when receiving the remaining three Big data buffer messages. Totally 10 Big data buffers are exchanged between the cores. The slave core on receiving the shutdown message, shuts itself down and reinitializes itself for future runs.

                    Then the host receives back the remaining returned messages before shutting down.

                    The size of the big data buffer is configurable compile time by changing value of the define BIGDATA_SIZE in shared/AppCommon.h

                    9.7.4. Host Linux example¶

                    Host linux example is only available starting from Processor SDK 4.0.0 release for AM57xx platform

                    Under the host_linux directory the simple_buffer_example is implemented for Host A15 running Linux and DSP core running TI-RTOS.

                    9.7.4.1. Architecture Updates for Linux¶

                    The following block diagram shows the various functional blocks used in the example on the host running linux.

                    

                    The SharedRegion and HeapMem modules are not currently supported for Linux in the TI Standard IPC package.

                    The example provides these modules with same/similar API implemented for Linux with some limitations.

                    The CMEM APIs provide user space allocation of contiguous memory for the Big data buffers.

                    9.7.4.2. How to Run the Example¶

                    The Processor SDK Linux release includes the pre-built binaries for the host_linux example as part of the tisdk-rootfs-image filesystem.

                    Step 1 : To run the demo, the first step is to make sure there is no other default applications using the same resources. For example, the following command is needed to disable the default OpenCL applications.

                    systemctl stop ti-mct-daemon.service 

                    Step 2: Switch the firmware running in the DSP. This can be done by using the following steps. Unbind dsp

                    echo 40800000.dsp > /sys/bus/platform/drivers/omap-rproc/unbind 

                    May need to unbind all the other cores as well to avoid issues.

                    Update firmware symbolic link

                    ln -sf /usr/bin/simple_buffer_example/release/server_dsp.xe66 /lib/firmware/dra7-dsp1-fw.xe66 

                    echo 40800000.dsp > /sys/bus/platform/drivers/omap-rproc/bind 

                    Step 3: Now the Host side application can be run using the following command

                    /usr/bin/simple_buffer_example/release/app_host 

                    The DSP side log can be checked by typing the following command to dump the trace.

                    cat /sys/kernel/debug/remoteproc/remoteproc2/trace0 

                    Here is a sample log.

                    root@am57xx-evm:~# /usr/bin/simple_buffer_example/release/app_host DSP1 --> main: [523682.897761] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [523682.903751] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [523682.911797] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 --> Main_main: --> App_create: App_create: Host is ready App_exec: CMEM_init success CMEM_getPool success CMEM_allocPool success: Allocated buffer 0xaa641000 SharedRegion_setup success App_taskFxn: SR_1, base 0xaa641000, len=1000000 HeapMem_setup success HeapMem_create success App_taskFxn: SR_1 heap, totalSize=16777216,totalFreeSize=16777216,largestFreeSize=16777216 App_taskFxn: SR_1 heap, buf=0x0xaa641080,size=16777216 App_exec: sending message 1 Shared memory phys Addr ffffffffa0000000 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received 1 App_exec: Preparing message 4 App_exec: Sending message 4 App_exec: message received 2 App_exec: Preparing message 5 App_exec: Sending message 5 App_exec: message received 3 App_exec: Preparing message 6 App_exec: Sending message 6 App_exec: message received 4 App_exec: Preparing message 7 App_exec: Sending message 7 App_exec: message received 5 App_exec: Preparing message 8 App_exec: Sending message 8 App_exec: message received 6 App_exec: Preparing message 9 App_exec: Sending message 9 App_exec: message received 7 App_exec: Preparing message 10 App_exec: Sending message 10 App_exec: message received 8 App_exec: Preparing message 11 App_exec: Sending message 11 App_exec: message received 9 App_exec: Preparing message 12 App_exec: Sending message 12 App_exec: message received 10 App_exec: Preparing message 13 App_exec: Sending message 13 App_exec: message received 11 App_exec: Preparing message 14 App_exec: Sending message 14 App_exec: message received 12 App_exec: Preparing message 15 App_exec: Sending message 15 App_exec: message received 13 App_exec: Preparing message 16 App_exec: Sending message 16 App_exec: message received: 14 App_exec: message received: 15 App_exec: message received: 16 App_exec: Data check clean App_delete: main: [ 0.000] registering rpmsg-proto:rpmsg-proto service on 61 with HOST [ 0.000] [t=0x003c5d7b] xdc.runtime.Main: NameMap_sendMessage: HOST 53, port=61 [ 0.000] [t=0x003d5186] xdc.runtime.Main: --> smain: [ 0.000] [t=0x003e8259] Server: Server_create: server is ready [ 0.000] [t=0x003ecc97] Server: Server_exec: [ 51.571] [t=0x00000008:a56e6a9a] Server: Message received. 1 [ 51.571] [t=0x00000008:a56f9b77] Server: Shared region entry configured. [ 51.571] [t=0x00000008:a5700cb1] Server: Server_exec: processed id 1, cmd=0x1 [ 51.571] [t=0x00000008:a570aea5] Server: Message received. 2 [ 51.571] [t=0x00000008:a57119fd] Server: Server_exec: processed id 2, cmd=0x0 [ 51.571] [t=0x00000008:a571b1e9] Server: Message received. 3 [ 51.571] [t=0x00000008:a5721eac] Server: Server_exec: processed id 3, cmd=0x0 [ 51.571] [t=0x00000008:a5755f6b] Server: Message received. 4 [ 51.573] [t=0x00000008:a583e61b] Server: Server_exec: processed id 4, cmd=0x2 [ 51.573] [t=0x00000008:a584a087] Server: Message received. 5 [ 51.574] [t=0x00000008:a592c2cc] Server: Server_exec: processed id 5, cmd=0x2 [ 51.574] [t=0x00000008:a5937d8c] Server: Message received. 6 [ 51.575] [t=0x00000008:a5a19aeb] Server: Server_exec: processed id 6, cmd=0x2 [ 51.575] [t=0x00000008:a5a2543d] Server: Message received. 7 [ 51.577] [t=0x00000008:a5b07d15] Server: Server_exec: processed id 7, cmd=0x2 [ 51.577] [t=0x00000008:a5b137c0] Server: Message received. 8 [ 51.578] [t=0x00000008:a5bf5d83] Server: Server_exec: processed id 8, cmd=0x2 [ 51.578] [t=0x00000008:a5c019cc] Server: Message received. 9 [ 51.579] [t=0x00000008:a5ce3dca] Server: Server_exec: processed id 9, cmd=0x2 [ 51.579] [t=0x00000008:a5cef75e] Server: Message received. 10 [ 51.581] [t=0x00000008:a5dd247a] Server: Server_exec: processed id 10, cmd=0x2 [ 51.581] [t=0x00000008:a5dde2d9] Server: Message received. 11 [ 51.582] [t=0x00000008:a5ec04df] Server: Server_exec: processed id 11, cmd=0x2 [ 51.582] [t=0x00000008:a5ecc1a3] Server: Message received. 12 [ 51.583] [t=0x00000008:a5fae91c] Server: Server_exec: processed id 12, cmd=0x2 [ 51.583] [t=0x00000008:a5fba4c6] Server: Message received. 13 [ 51.585] [t=0x00000008:a609d1c1] Server: Server_exec: processed id 13, cmd=0x2 [ 51.585] [t=0x00000008:a60a8dd4] Server: Message received. 14 [ 51.585] [t=0x00000008:a60af96e] Server: Server_exec: processed id 14, cmd=0x0 [ 51.585] [t=0x00000008:a60b9229] Server: Message received. 15 [ 51.585] [t=0x00000008:a60bffd3] Server: Server_exec: processed id 15, cmd=0x0 [ 51.585] [t=0x00000008:a60e179b] Server: Message received. 16 [ 51.585] [t=0x00000008:a60e9727] Server: Server_exec: processed id 16, cmd=0x2000000 [ 51.585] [t=0x00000008:a60f3fb7] Server: Server_exec: Data check clean [ 51.585] [t=0x00000008:a60fb280] Server: Server_delete: [ 51.585] [t=0x00000008:a6114fa2] Server: Server_exec: root@am57xx-evm:~#

                    9.7.4.3. How to Re-Build the example¶

                    Also source code for the example is included in the Processor SDK Linux release. Once installed the source files can be found in the directory example-applications/big-data-ipc-demo-linux_.

                    Prerequisites: Also need to have the Processor SDK RTOS release installed to build the DSP side RTOS image. See the instruction in RTOS SDK Getting Started Guide

                    The example can be rebuilt by using the following commands.

                    export TI_RTOS_PATH=TI_RTOS_PROC_SDK_INSTALL_DIR> make big-data-ipc-demo 

                    export TI_RTOS_PATH=$HOME/ti make big-data-ipc-demo

                    The test binaries can be installed into the default filesystem using the command.

                    make big-data-ipc-demo_install 

                    Rules.make file can be edited to change the DESTDIR where the binaries will be installed.

                    9.7.4.3.1. Source files¶

                    The source files for the example are located at

                    processor-sdk_linux-platform>-version>/example-applications/big-data-ipc-demo-linux-version>/host_linux/simple_buffer_example. 

                    The host directory and dsp directory has the corresponding sources. The shared folder contains some common sources. The main sequence for big data IPC can be followed by looking at host/App.c and dsp/Server.c. |

                    9.7.4.3.2. Memory layout details¶

                    The DSP side memory layout can be found in the file host_linux/simple_buffer_example/shared//config.bld. Also note the addition of the following section in host_linux/simple_buffer_example/shared//rsc_table_dsp.h. Please note the reserved carve-out in the DSP resource table

                    Make sure this matches what is configured in the linux device tree

                    1. define DSP_CMEM_IOBUFS 0xA0000000
                    2. define PHYS_CMEM_IOBUFS 0xA0000000
                    3. define DSP_CMEM_IOBUFS_SIZE (SZ_1M * 192)

                    The CMEM area allocated from this region is used for the big data buffers.

                    9.7.5. Host RTOS example¶

                    Under the host_bios directory the simple_buffer_example is implemented for Host A15 and DSP both running TI RTOS/BIOS.

                    9.7.5.1. How to Run the Example¶

                    The Processor SDK RTOS release include the pre-built binaries for the host_bios example under:

                    processor_sdk_platform>_version>/demos/bigdataipc/prebuilt-binaries/board-name>/simple_buffer_example/release/ 

                    Also for the platforms that support boot through SDcard, pre-built boot image or ‘app’ bootable through SBL is located under:

                    processor_sdk_platform>_version>/demos/bigdataipc/prebuilt-binaries/bootimages/host_bios/simple_buffer_example/board-name>/app 

                    9.7.5.1.1. AM57xx & K2G boards¶

                    1. Create a bootable SDCard using the procedure here: Creating SD card in Windows or Create SD card in Linux

                    2. Connect the UART on the hardware to the Host. ( Configure the terminal/console to Baud Rate= 115200, Data Bits= 8 , Parity= None, Flow Control= Off )

                    • Copy/overwrite the pre-built boot image ‘app’ corresponding to the board to a bootable SD Card
                    • Insert the SD card into the board
                    • Boot/Reboot the board

                    The application will be loaded and run automatically and the “Host: Test Passed” message will be printed to the UART console.

                    

                    9.7.5.1.2. K2H, K2K, K2L, K2E Boards¶

                    The prebuilt elf binaries of Host and DSP images can be loaded through CCS to the appropriate cores and run.

                    9.7.5.2. How to Re-Build the Example¶

                    The bigdata ipc examples can be built from the Processor SDK top level directory using the following steps

                    1. Build environment setup

                    cd processor_sdk_platform>_version> export SDK_INSTALL_PATH=Base directory where Processor SDK is installed> source setupenv.sh 

                    cd processor_sdk_platform>_version> set SDK_INSTALL_PATH=Base directory where Processor SDK is installed> setupenv.bat 

                    make bigdataipc_examples 

                    This creates the elf binaries for both the host and DSP cores. And the binaries can be installed using

                    make bigdataipc_examples_install 

                    (NOTE: The above command installs the elf binaries under the prebuilt-binaries location mentioned above. Need to convert the prebuilt elf binaries into bootable images refer to Processor SDK RTOS Boot )

                    The source files for the example are located at

                    processor_sdk_platform>_version>/demos/bigdataipc/host_bios/simple_buffer_example. 

                    The host directory and dsp directory has the corresponding sources. The shared folder contains some common sources. The main sequence for big data IPC can be followed by looking at host/App.c and dsp/Server.c.

                    9.8. TI-RTOS Kernel Example¶

                    9.8.1. Overview¶

                    The SYS/BIOS examples gets user started with development of code using a real-time operating system. These are simple examples that does not get into details of software components provided in the SDK.

                    9.8.2. ARM Cortex-A53¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout. As a sample we will use the AM65x device to describe the steps for the Cortex-A53.

                    For future Device Support Package releases, the Hello World example for the Cortex-A53 will be added to CCS as an out-of-box experience.

                    1. Create a work space folder (/ti/am65x_am53_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    2. In CCS, go to File –> New –> CCS Project

                    3. Enter a project name and configure the new CCS project as follows:

                    • Target: GPEVM_AM65x
                    • Cortex A
                    • Compiler: GNU v7.2.1 (Linaro aarch64) (or higher)
                    • Device Endianness: little
                    • Linker Command File: (PDK INSTALL PATH)/packages/ti/build/am65xx/linker_a53.lds

                    4. Select the Empty Project (with main.c) template and click Finish.

                    5. Remove startup_ARMCA53.S from the project. Add the file sysbios_a53.cfg located in the folder (PDK INSTALL PATH)/packages/ti/build/am65xx/.

                    You will be prompted to enable XDCtools, click yes.

                    6. In Project Properties –> CCS General –> Products, set Target to gnu.targets.arm.A53F and Platform to ti.platforms.cortexA:AM65X. Uncheck all products except for SYS/BIOS and XDCtools. Refer to the Release Notes for the recommended package verisons. Click Apply and Close.

                    7. Add the file InitMmu.c located under (IPC INSTALL PATH)/examples/AM65XX_bios_elf/ex02_messageq/host to the project.

                    8. In Project Properties –> CCS Build –> XDCtools –> Package Repositories, add the path $/packages

                    9. In Project Properties –> GNU Linker –> Libraries, add the gcc and rdimon libraries, and the library search path “$>”

                    10. In Project Properties –> GNU Linker –> Basic, check the option “Do not use the standard system startup files when linking (-nostartfiles).”

                    11. Navigate to Project Properties –> GNU Compiler –> Debugging and uncheck “Do not emit DWARF additions beyong selected version” and set the gdwarf version to 2 or lower.

                    12. Finally, add the following code to main.c and build the project.

                    #include "stdio.h" int main(void)  printf("hello world"); return 0; > 

                    13. Launch the target configuration using the appropriate emulator to connect to AM65x EVM as described in the AM65x EVM Hardware Setup Guide.

                    14. Right click on DMSC_Cortex_M3_0 and click Connect Target.

                    15. Connect to the CortexA53_0_0 core. Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.3. ARM Cortex-A15¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout. As a sample we will use the AM572x device to describe the steps. The same steps can be used for create hello world examples for A15 cores in Keystone 2 family of devices.

                    • The K2G, K2E and K2H devices, can be located under Unclassified devices in the Resource Explorer. Refer below Screenshot for Keystone II

                    

                    1. Create a work space folder (tiam_572x_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    1. On CCS click View –> Resource Explorer (Examples).

                    3. On SYS/BIOS scroll down to AM572X –> Cortex A –> Generic Example –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    

                    1. On New CCS Project window enter project name and then click Next.

                    6. On RSTC window select platform name: ti.platforms.evmAM572X and check that the target is set to gnu.targets.arm.A15F

                    1. Click Finish. Your project should show up on Project Explorer window.

                    8. To get log message to print on console add this variable to hello.cfg file:

                    var SemiHostSupport = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');

                    You also need to replace the nosys library in linker with rdimon which is the Semi-Hosting enabled BSP library.

                    Right click on project –> Show Build Settings. –> Build –> GNU Linker –> Libraries

                    9. Build Hello Example project by Right click on Hello Project and click Build project.

                    10. Create new target configuration (if one doesn`t exist) as described in here Create Target Configuration File for EVM

                    11. Right click on the target configuration and Launch target configurations.

                    1. Right click CortexA15_0 and connect target.

                    13. Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.4. ARM Cortex-A9¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout.

                    1. Create a work space folder (\ti\am_437x_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    1. On CCS click View –> Resource Explorer (Examples).

                    3. On SYS/BIOS scroll down to AM4378 –> Cortex A –> Generic Example –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    

                    1. On New CCS Project window enter project name and then click Next.

                    6. On RSTC window select platform name: ti.platforms.evmAM437X and check that the target is set to gnu.targets.arm.A9F

                    1. Click Finish. Your project should show up on Project Explorer window.

                    8. To get log message to print on console add this variable to hello.cfg file:

                    var SemiHostSupport = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');

                    You also need to replace the nosys library in linker with rdimon which is the Semi-Hosting enabled BSP library.

                    Right click on project –> Show Build Settings. –> Build –> GNU Linker –> Libraries

                    9. Build Hello Example project by Right click on Hello Project and click Build project.

                    10. Create new target configuration (if one doesn`t exist) as described here Create Target Configuration File for EVM

                    11. Right click on the target configuration and Launch target configurations.

                    1. Right click CortexA9_0 and connect target.

                    13. Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.5. ARM Cortex-A8¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout.

                    1. Create a work space folder (\ti\am_335x_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    2. On CCS click View –> Resource Explorer (Examples).

                    3. On SYS/BIOS scroll down to AM3352 –> Cortex A –> Generic Example –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    5. On New CCS Project window enter project name and then click Next.

                    

                    6. On RSTC window select platform name: ti.platforms.evmAM335X and check that the target is set to gnu.targets.arm.A8F

                    7. Click Finish. Your project should show up on Project Explorer window.

                    8. To get log message to print on console add this variable to hello.cfg file:

                    var SemiHostSupport = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');

                    You also need to replace the nosys library in linker with rdimon which is the Semi-Hosting enabled BSP library.

                    Right click on project –> Show Build Settings. –> Build –> GNU Linker –> Libraries

                    9. Build Hello Example project by Right click on Hello Project and click Build project.

                    10. Create new target configuration (if one doesn`t exist) as described here Create Target Configuration File for EVM

                    11. Right click on the target configuration and Launch target configurations.

                    1. Right click CortexA8_0 and connect target.

                    13. Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.6. ARM Cortex-R5¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout.

                    1. Create a work space folder (/ti/am65x_r5_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    2. On CCS click View –> Resource Explorer Classic.

                    3. On SYS/BIOS scroll down to AM65x - Cortex A53 –> AM6548 –> Cortex R –> TI Target Examples –> Generic Examples –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    5. On New CCS Project window enter project name, set the device endianness to little, and add the linker command file located at (PDK INSTALL PATH)/packages/ti/build/am65xx/linker_r5_sysbios.lds and click Next.

                    6. On RSTC window, make sure the correct XDCtools version is selected and select the correct versions of the SYS/BIOS and PDK packages.

                    7. Set the platform to ti.platforms.cortexR:AM65X and set the target to ti.targets.arm.elf.R5F.

                    

                    1. Click Finish. Your project should appear in Project Explorer window.
                    2. Launch the target configuration using the appropriate emulator to connect to AM65x EVM as described in the AM65x EVM Hardware Setup Guide.
                    3. Right click on DMSC_Cortex_M3_0 and click Connect Target.
                    4. Connect to the MCU_PULSAR_Cortex_R5_0 core. Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.7. ARM Cortex-M4¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout.

                    1. Create a work space folder (/ti/am_572x_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    2. On CCS click View –> Resource Explorer (Examples).

                    3. on SYS/BIOS scroll down to AM572X –> Cortex M –> Generic Example –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    5. On New CCS Project window enter project name and then click Next.

                    

                    6. On RSTC window select platform name: ti.platforms.evmAM572X and check that the target is set to gnu.targets.arm.elf.M4

                    7. Click Finish. Your project should show up on Project Explorer window.

                    8. Build Hello Example project by Right click on Hello Project and click Build project.

                    9. Launch target configurations using appropriate emulator to connect to AM572X EVM.

                    10. Right click CortexA15_0 and connect target. From the Scripts menu select AM572x Multicore Initialization->IPU1SSClkEnable_API.

                    11. Connect to the Cortex_M4_IPU1_C0. Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.8. DSP C66x¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout. As a sample we will use the AM572x device to describe the steps but the same steps can be used for create hello world examples for C66x cores in Keystone I and Keystone 2 family of devices.

                    • The C66x examples corresponding Keystone I devices can be located under C66x Multi-core DSP devies in the Resource Explorer. Refer below screenshot

                    

                    • The K2G, K2E and K2H devices, can be located under Unclassified devices in the Resource Explorer. Refer below screen shot

                    

                    1. Create a work space folder (tiam_572x_hello_workspace) under ti folder to be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish

                    1. On CCS click View –> Resource Explorer (Examples).

                    3. on SYS/BIOS scroll down to AM572X –> C66x –> Generic Example –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    

                    1. On New CCS Project window enter project name and then click Next.

                    6. On RSTC window select platform name: ti.platforms.evmAM572X and check that the target is set to ti.targets.elf.C66 (Auto populated)

                    1. Click Finish. Your project should show up on Project Explorer window.

                    8. Build Hello Example project by Right click on Hello Project and click Build project.

                    10. Create new target configuration (if one doesn`t exist) as described here.

                    11. Right click on the target configuration and Launch target configurations.

                    12. Right click CortexA15_0 and connect target. From the Scripts menu select AM572x Multicore Initialization->DSP1SSClkEnable_API.

                    13. Route the GPTimer5 suspend ctrl signal to the DSP using the Scripts menu GP timer Suspend Ctrl -> GPTimer5SuspendCtl_DSP1SS_BIOS as described here.

                    14. Connect to C66x_DSP1 Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    9.8.9. DSP C674x¶

                    The hello example serves as a basic sanity check program for SYS/BIOS. It demonstrates how to print the string ‘hello world’ to stdout. As a sample we will use the C6748 device to describe the steps but the same steps can be used for create hello world examples for C674x cores in OMAPL1x/DA8x family of devices.

                    • Locate the appropriate device that you are using to make sure the correct SYSBIOS platform definiition gets used in the build

                    1. Create a work space folder ( Eg. tirtos_hello_workspace) that can be used for Hello Example project, and start CCS. You may be prompted with New Products Discovered, so select all and click on Finish Note: at this stage the version of SYSBIOS and corresponding dependencies are assumed to be discovered by CCS. If not please follow the steps described here: Discovering_SDK_products

                    1. On CCS click View –> Resource Explorer Classic (Examples).

                    3. on SYS/BIOS scroll down to C6748 /OMAPL1x and select –> C674x –> Generic Example –> click on Hello Example.

                    

                    4. To import Hello Example, on the right window click on step 1. Import The Example to CCS Project.

                    

                    1. On New CCS Project window enter project name and then click Next.

                    6. On RSTC window select platform name: ti.platforms.evmc6748 and check that the target is set to ti.targets.elf.C674 (Auto populated)

                    

                    1. Click Finish. Your project should show up on Project Explorer window.

                    8. Build Hello Example project by Right click on Hello Project and click Build project.

                    10. Create new target configuration (if one doesn`t exist) as described here.

                    11. Right click on the target configuration and Launch target configurations.

                    12. Developers can Connect to the C674x on OMAPL137/C6747/C6748 can connect directly to the DSP. For OMAPL138 device, you will need to connect to the ARM as this is ARM master boot device and ARM needs to power up the DSP You should see the following log in the Console

                    C674X_0: Output: Target Connected. C674X_0: Output: --------------------------------------------- C674X_0: Output: Memory Map Cleared. C674X_0: Output: --------------------------------------------- C674X_0: Output: Memory Map Setup Complete. C674X_0: Output: --------------------------------------------- C674X_0: Output: PSC Enable Complete. C674X_0: Output: --------------------------------------------- C674X_0: Output: PLL0 init done for Core:300MHz, EMIFA:25MHz C674X_0: Output: DDR initialization is in progress. C674X_0: Output: PLL1 init done for DDR:150MHz C674X_0: Output: Using DDR2 settings C674X_0: Output: DDR2 init for 150 MHz is done C674X_0: Output: --------------------------------------------- 

                    13. Connect to C674x_DSP1 Load and run Hello Example out file. You should see Hello World string displayed on console window.

                    

                    9.8.10. Usage Notes¶

                    After execution of the hello world examples on the core, the CCS Editor may report “Can’t find a source file” error messages when you pause or the application exits/aborts after completion. This occurs due to source files from SYSBIOS or XDC packages not being in the default search path of the CCS Editor. when you run into this issue, you can navigate to the file using Locate file option in the Editor. Once you provide the location the CCS Editor will be able to locate all the other required files from that package based on relative path.

                    For example, when running SYS/BIOS Hello Example using AM57x-GP EVM if you see the message

                    Can't find a source file at "/db/ztree/library/trees/xdctargets/xdctargets-i02/src/gnu/targets /arm/rtsv7A/syscalls.c" Locate the file or edit the source lookup path to include its location. The above file is located under file path $\bios_6_42_02_29\packages\gnu\targets\arm\rtsv7A

                    You can also prevent these issues by adding the Processor SDK components to file search path under Windows->Preferences options in CCS GUI.

                    9.8.11. Known Issues¶

                    • SYS/BIOS examples for Cortex-A15 generate linker errors due to the FPU related flags

                    Some versions of CCS are impacted by linker setting used in CCS RTOS templates and may need some manual modification to set the correct -mfpu, -mcpu and -march. If you are seeing VFP errors in the link step, you are most likely running into this issue. To correct this issue please check the resolution here: https://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/539973

                    9.8.12. Useful Resources¶

                    • TI RTOS training
                    • SYS/BIOS Information
                    • SYS/BIOS FAQ